serialport.fit.eqn

VHDL基础的编程源代码

--E1_idata[0] is serialport_rx:inst4|idata[0] at LC10
E1_idata[0]_p0_out = reset & !E1_currentState[3] & E1_idata[0] & !E1_currentState[2] & !E1_currentState[0] & !E1_currentState[1];
E1_idata[0]_p1_out = !rx & !E1_bit_index[1] & !E1_bit_index[0] & !E1_bit_index[2] & M1_dffs[3] & M1_dffs[2] & M1_dffs[1] & M1_dffs[0] & reset & !E1_currentState[3] & E1_idata[0];
E1_idata[0]_p2_out = !rx & !E1_bit_index[1] & !E1_bit_index[0] & !E1_bit_index[2] & M1_dffs[3] & M1_dffs[2] & M1_dffs[1] & M1_dffs[0] & reset & E1_idata[0] & !E1_currentState[2] & !E1_currentState[0];
E1_idata[0]_p4_out = !rx & !E1_bit_index[1] & !E1_bit_index[0] & !E1_bit_index[2] & M1_dffs[3] & M1_dffs[2] & M1_dffs[1] & M1_dffs[0] & reset & E1_idata[0] & !E1_currentState[2] & !E1_currentState[1];
E1_idata[0]_or_out = E1L22 # E1_idata[0]_p0_out # E1_idata[0]_p1_out # E1_idata[0]_p2_out # E1_idata[0]_p4_out;
E1_idata[0]_reg_input = E1_idata[0]_or_out;
E1_idata[0] = TFFE(E1_idata[0]_reg_input, !D1_baudrate_clock, , , );


--E1_data[3] is serialport_rx:inst4|data[3] at LC63
E1_data[3]_p1_out = E1_idata[3] & reset & !E1_data[3] & A1L21 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L7 & E1L52;
E1_data[3]_p2_out = !E1_idata[3] & reset & E1_data[3] & A1L21 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L7 & E1L52;
E1_data[3]_or_out = E1_data[3]_p1_out # E1_data[3]_p2_out;
E1_data[3]_reg_input = E1_data[3]_or_out;
E1_data[3] = TFFE(E1_data[3]_reg_input, !D1_baudrate_clock, , , );


--E1_data[1] is serialport_rx:inst4|data[1] at LC62
E1_data[1]_p1_out = E1_idata[1] & reset & !E1_data[1] & A1L21 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L7 & E1L52;
E1_data[1]_p2_out = !E1_idata[1] & reset & E1_data[1] & A1L21 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L7 & E1L52;
E1_data[1]_or_out = E1_data[1]_p1_out # E1_data[1]_p2_out;
E1_data[1]_reg_input = E1_data[1]_or_out;
E1_data[1] = TFFE(E1_data[1]_reg_input, !D1_baudrate_clock, , , );


--E1_data[2] is serialport_rx:inst4|data[2] at LC61
E1_data[2]_p1_out = E1_idata[2] & reset & !E1_data[2] & A1L21 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L7 & E1L52;
E1_data[2]_p2_out = !E1_idata[2] & reset & E1_data[2] & A1L21 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L7 & E1L52;
E1_data[2]_or_out = E1_data[2]_p1_out # E1_data[2]_p2_out;
E1_data[2]_reg_input = E1_data[2]_or_out;
E1_data[2] = TFFE(E1_data[2]_reg_input, !D1_baudrate_clock, , , );


--E1_data[6] is serialport_rx:inst4|data[6] at LC57
E1_data[6]_p1_out = E1_idata[6] & reset & !E1_data[6] & A1L21 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L7 & E1L52;
E1_data[6]_p2_out = !E1_idata[6] & reset & E1_data[6] & A1L21 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L7 & E1L52;
E1_data[6]_or_out = E1_data[6]_p1_out # E1_data[6]_p2_out;
E1_data[6]_reg_input = E1_data[6]_or_out;
E1_data[6] = TFFE(E1_data[6]_reg_input, !D1_baudrate_clock, , , );


--E1_data[5] is serialport_rx:inst4|data[5] at LC74
E1_data[5]_p1_out = E1_idata[5] & reset & !E1_data[5] & A1L23 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L9 & E1L53;
E1_data[5]_p2_out = !E1_idata[5] & reset & E1_data[5] & A1L23 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L9 & E1L53;
E1_data[5]_or_out = E1_data[5]_p1_out # E1_data[5]_p2_out;
E1_data[5]_reg_input = E1_data[5]_or_out;
E1_data[5] = TFFE(E1_data[5]_reg_input, !D1_baudrate_clock, , , );


--E1_data[4] is serialport_rx:inst4|data[4] at LC73
E1_data[4]_p1_out = E1_idata[4] & reset & !E1_data[4] & A1L23 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L9 & E1L53;
E1_data[4]_p2_out = !E1_idata[4] & reset & E1_data[4] & A1L23 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L9 & E1L53;
E1_data[4]_or_out = E1_data[4]_p1_out # E1_data[4]_p2_out;
E1_data[4]_reg_input = E1_data[4]_or_out;
E1_data[4] = TFFE(E1_data[4]_reg_input, !D1_baudrate_clock, , , );


--E1_data[0] is serialport_rx:inst4|data[0] at LC67
E1_data[0]_p1_out = E1_idata[0] & reset & !E1_data[0] & A1L23 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L9 & E1L53;
E1_data[0]_p2_out = !E1_idata[0] & reset & E1_data[0] & A1L23 & E1_bit_index[0] & E1_bit_index[2] & E1_bit_index[1] & M1L9 & E1L53;
E1_data[0]_or_out = E1_data[0]_p1_out # E1_data[0]_p2_out;
E1_data[0]_reg_input = E1_data[0]_or_out;
E1_data[0] = TFFE(E1_data[0]_reg_input, !D1_baudrate_clock, , , );


--C1L1 is ledarray_drv:inst2|Mux~11707 at SEXP108
C1L1 = EXP(!C1_next_cs[5] & !C1_next_cs[4] & !C1_next_cs[2] & !C1_next_cs[3] & C1_next_cs[0] & !C1_next_cs[1] & !C1_next_cs[7]);


--C1L2 is ledarray_drv:inst2|Mux~11708 at SEXP117
C1L2 = EXP(!C1_next_cs[7] & !C1_next_cs[4] & !C1_next_cs[2] & !C1_next_cs[3] & C1_next_cs[0] & !C1_next_cs[1]);


--C1L3 is ledarray_drv:inst2|Mux~11709 at SEXP115
C1L3 = EXP(!C1_next_cs[7] & !C1_next_cs[2] & !C1_next_cs[3] & C1_next_cs[0] & !C1_next_cs[1]);


--C1L4 is ledarray_drv:inst2|Mux~11710 at SEXP114
C1L4 = EXP(!C1_next_cs[7] & !C1_next_cs[1] & !C1_next_cs[3] & C1_next_cs[0]);


--C1L5 is ledarray_drv:inst2|Mux~11711 at SEXP41
C1L5 = EXP(!C1_next_cs[7] & !C1_next_cs[1] & C1_next_cs[0]);


--C1L6 is ledarray_drv:inst2|Mux~11712 at SEXP33
C1L6 = EXP(!C1_next_cs[7] & !C1_next_cs[1]);


--C1L12 is ledarray_drv:inst2|Mux~11725 at LC43
C1L12_p0_out = C1_next_cs[1] & C1_next_cs[7];
C1L12_p1_out = !E1_data[3] & reset & !E1_data[6] & E1_data[4] & E1_data[5];
C1L12_p2_out = reset & !E1_data[6] & E1_data[4] & E1_data[5] & !E1_data[1] & !E1_data[2];
C1L12_p3_out = C1L5 & C1_next_cs[3];
C1L12_p4_out = C1L6 & !C1_next_cs[0];
C1L12_or_out = C1L12_p0_out # C1L12_p1_out # C1L12_p2_out # C1L12_p3_out # C1L12_p4_out;
C1L12 = C1L12_or_out;


--C1_row[7] is ledarray_drv:inst2|row[7] at LC113
C1_row[7]_p1_out = !C1L12 & C1L7 & C1L8 & C1L9 & C1L10 & C1L11;
C1_row[7]_or_out = C1_row[7]_p1_out;
C1_row[7]_reg_input = !(C1_row[7]_or_out);
C1_row[7] = DFFE(C1_row[7]_reg_input, !B1_carrier, , reset, );


--C1L13 is ledarray_drv:inst2|Mux~11734 at SEXP98
C1L13 = EXP(E1_data[1] & !E1_data[0] & !E1_data[2] & !C1_next_cs[7] & C1_next_cs[6]);


--C1_row[1] is ledarray_drv:inst2|row[1] at LC102
C1_row[1]_p0_out = !E1_data[1] & reset & !E1_data[6] & E1_data[4] & E1_data[5] & !E1_data[2];
C1_row[1]_p1_out = C1L60 & !C1_next_cs[0];
C1_row[1]_p2_out = C1_next_cs[1] & C1_next_cs[7];
C1_row[1]_or_out = C1L50 # C1_row[1]_p0_out # C1_row[1]_p1_out # C1_row[1]_p2_out;
C1_row[1]_reg_input = C1_row[1]_or_out;
C1_row[1] = DFFE(C1_row[1]_reg_input, !B1_carrier, , reset, );


--C1L86 is ledarray_drv:inst2|row[7]~70 at LC99
C1L86_or_out = !C1_row[7];
C1L86 = !(C1L86_or_out);


--C1L14 is ledarray_drv:inst2|Mux~11746 at SEXP94
C1L14 = EXP(!C1_next_cs[3] & C1_next_cs[0] & !C1_next_cs[1] & !C1_next_cs[4] & !C1_next_cs[5] & !C1_next_cs[7] & !C1_next_cs[6]);


--C1L15 is ledarray_drv:inst2|Mux~11747 at SEXP93
C1L15 = EXP(C1_next_cs[0] & !C1_next_cs[1] & !C1_next_cs[4] & !C1_next_cs[5] & !C1_next_cs[7] & !C1_next_cs[6]);


--C1L16 is ledarray_drv:inst2|Mux~11748 at SEXP91
C1L16 = EXP(!C1_next_cs[1] & !C1_next_cs[4] & !C1_next_cs[5] & !C1_next_cs[7] & !C1_next_cs[6]);


--C1L17 is ledarray_drv:inst2|Mux~11749 at SEXP89
C1L17 = EXP(!C1_next_cs[4] & !C1_next_cs[5] & !C1_next_cs[7] & !C1_next_cs[6]);


--C1L18 is ledarray_drv:inst2|Mux~11750 at SEXP88
C1L18 = EXP(!C1_next_cs[5] & !C1_next_cs[7] & !C1_next_cs[6]);


--C1L19 is ledarray_drv:inst2|Mux~11751 at SEXP86
C1L19 = EXP(!C1_next_cs[7] & !C1_next_cs[6]);


--C1L20 is ledarray_drv:inst2|Mux~11758 at LC35
C1L20_p0_out = !E1_data[3] & E1_data[1] & reset & !E1_data[6] & E1_data[4] & E1_data[5] & E1_data[2] & !E1_data[0] & !C1_next_cs[7] & !C1_next_cs[4] & !C1_next_cs[2] & !C1_next_cs[1];
C1L20_p1_out = C1_next_cs[0] & !E1_data[3] & E1_data[1] & reset & !E1_data[6] & E1_data[4] & E1_data[5] & E1_data[2] & E1_data[0];
C1L20_p2_out = C1_next_cs[0] & !E1_data[1] & reset & !E1_data[6] & E1_data[4] & E1_data[5] & !E1_data[2] & !C1_next_cs[3] & !C1_next_cs[7] & !C1_next_cs[4];
C1L20_p3_out = C1_next_cs[0] & !E1_data[3] & reset & !E1_data[6] & E1_data[4] & E1_data[5] & E1_data[0] & !C1_next_cs[7] & !C1_next_cs[2] & !C1_next_cs[1];
C1L20_p4_out = !E1_data[3] & !E1_data[1] & reset & !E1_data[6] & E1_data[4] & E1_data[5] & E1_data[2] & !E1_data[0] & !C1_next_cs[3] & !C1_next_cs[2] & !C1_next_cs[5];
C1L20_or_out = C1L51 # C1L20_p0_out # C1L20_p1_out # C1L20_p2_out # C1L20_p3_out # C1L20_p4_out;
C1L20 = C1L20_or_out;


--C1L21 is ledarray_drv:inst2|Mux~11764 at LC84
C1L21_p0_out = C1_next_cs[7] & C1_next_cs[6];
C1L21_p1_out = C1L16 & !C1_next_cs[0];
C1L21_p2_out = C1L17 & C1_next_cs[1];
C1L21_p3_out = C1L18 & C1_next_cs[4];
C1L21_p4_out = C1L19 & C1_next_cs[5];
C1L21_or_out = C1L52 # C1L21_p0_out # C1L21_p1_out # C1L21_p2_out # C1L21_p3_out # C1L21_p4_out;
C1L21 = C1L21_or_out;


--C1_row[5] is ledarray_drv:inst2|row[5] at LC109
C1_row[5]_p1_out = C1_next_cs[3] & !E1_data[3] & E1_data[1] & reset & !E1_data[6] & E1_data[4] & E1_data[5];
C1_row[5]_or_out = C1L21 # C1_row[5]_p1_out # C1L20;
C1_row[5]_reg_input = C1_row[5]_or_out;
C1_row[5] = DFFE(C1_row[5]_reg_input, !B1_carrier, , reset, );


--C1L22 is ledarray_drv:inst2|Mux~11776 at LC38
C1L22_p0_out = E1_data[2] & C1_next_cs[6] & E1_data[0] & E1_data[1];
C1L22_p1_out = E1_data[3] & E1_data[2];
C1L22_p2_out = E1_data[3] & C1_next_cs[6] & E1_data[0];
C1L22_p3_out = !E1_data[3] & !E1_data[2] & E1_data[0] & !E1_data[1];
C1L22_p4_out = E1_data[3] & E1_data[0] & C1_next_cs[4] & !C1_next_cs[5];
C1L22_or_out = C1L54 # C1L22_p0_out # C1L22_p1