serialport.sim.rpt

VHDL基础的编程源代码

; |serialport|serialport_tx:inst7|add~390              ; |serialport|serialport_tx:inst7|add~390              ; dataout          ;
; |serialport|serialport_tx:inst7|bit_index[2]         ; |serialport|serialport_tx:inst7|bit_index[2]         ; dataout          ;
; |serialport|pwm:inst1|clock_out                      ; |serialport|pwm:inst1|clock_out                      ; dataout          ;
; |serialport|serialport_tx:inst7|tx~854               ; |serialport|serialport_tx:inst7|tx~854               ; dataout          ;
; |serialport|serialport_tx:inst7|tx~855               ; |serialport|serialport_tx:inst7|tx~855               ; dataout          ;
; |serialport|serialport_tx:inst7|currentState~2217    ; |serialport|serialport_tx:inst7|currentState~2217    ; pexpout          ;
; |serialport|serialport_tx:inst7|currentState~2223    ; |serialport|serialport_tx:inst7|currentState~2223    ; pexpout          ;
; |serialport|serialport_tx:inst7|currentState~2227    ; |serialport|serialport_tx:inst7|currentState~2227    ; pexpout          ;
; |serialport|serialport_tx:inst7|currentState[2]~2233 ; |serialport|serialport_tx:inst7|currentState[2]~2233 ; pexpout          ;
; |serialport|serialport_tx:inst7|currentState[3]~2237 ; |serialport|serialport_tx:inst7|currentState[3]~2237 ; pexpout          ;
; |serialport|serialport_tx:inst7|add~397              ; |serialport|serialport_tx:inst7|add~397              ; pexpout          ;
; |serialport|serialport_tx:inst7|add~402              ; |serialport|serialport_tx:inst7|add~402              ; pexpout          ;
; |serialport|serialport_tx:inst7|bit_index~253        ; |serialport|serialport_tx:inst7|bit_index~253        ; pexpout          ;
; |serialport|serialport_tx:inst7|add~408              ; |serialport|serialport_tx:inst7|add~408              ; pexpout          ;
; |serialport|serialport_tx:inst7|add~414              ; |serialport|serialport_tx:inst7|add~414              ; pexpout          ;
; |serialport|serialport_tx:inst7|tx~862               ; |serialport|serialport_tx:inst7|tx~862               ; pexpout          ;
; |serialport|serialport_tx:inst7|tx~868               ; |serialport|serialport_tx:inst7|tx~868               ; pexpout          ;
; |serialport|serialport_tx:inst7|tx~874               ; |serialport|serialport_tx:inst7|tx~874               ; pexpout          ;
; |serialport|clock_1Hz                                ; |serialport|clock_1Hz                                ; dataout          ;
; |serialport|clock_9600X2                             ; |serialport|clock_9600X2                             ; dataout          ;
; |serialport|reset                                    ; |serialport|reset                                    ; dataout          ;
; |serialport|clock_9600                               ; |serialport|clock_9600                               ; padio            ;
; |serialport|tx                                       ; |serialport|tx                                       ; padio            ;
; |serialport|serialport_tx:inst7|tx~888               ; |serialport|serialport_tx:inst7|tx~888               ; dataout          ;
+------------------------------------------------------+------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                                                                                                           ;
+------------------------------------------------------------------------+------------------------------------------------------------------------+------------------+
; Node Name                                                              ; Output Port Name                                                       ; Output Port Type ;
+------------------------------------------------------------------------+------------------------------------------------------------------------+------------------+
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[1]     ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[1]     ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[1]          ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[1]          ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[2]     ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[2]     ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[2]          ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[2]          ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[3]     ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[3]     ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[3]          ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[3]          ; dataout          ;
; |serialport|rtl~404                                                    ; |serialport|rtl~404                                                    ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|_~535       ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|_~535       ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[4]     ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[4]     ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[4]          ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[4]          ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[5]     ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[5]     ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[5]          ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[5]          ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[6]     ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[6]     ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[6]          ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[6]          ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[7]     ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[7]     ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[7]          ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[7]          ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[8]     ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[8]     ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[8]          ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[8]          ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[9]     ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[9]     ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[9]          ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[9]          ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[10]    ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[10]    ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[10]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[10]         ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[11]    ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[11]    ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[11]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[11]         ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[12]    ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[12]    ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[12]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[12]         ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[13]    ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[13]    ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[13]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[13]         ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[14]    ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[14]    ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[14]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[14]         ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[15]    ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[15]    ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[15]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[15]         ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[16]    ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[16]    ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[16]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[16]         ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[17]    ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[17]    ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[17]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[17]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[18]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[18]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[19]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[19]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[20]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[20]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[21]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[21]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[22]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[22]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[23]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[23]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[24]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[24]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[25]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[25]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[26]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[26]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[27]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[27]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[28]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[28]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[29]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[29]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[30]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[30]         ; dataout          ;
; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[31]         ; |serialport|pwm:inst1|lpm_counter:delay_counter_rtl_1|dffs[31]         ; dataout          ;
; |serialport|serialport_tx:inst7|idata[6]                               ; |serialport|serialport_tx:inst7|idata[6]                               ; dataout          ;
; |serialport|serialport_tx:inst7|idata[3]                               ; |serialport|serialport_tx:inst7|idata[3]                               ; dataout          ;
; |serialport|serialport_tx:inst7|idata[0]                               ; |serialport|serialport_tx:inst7|idata[0]                               ; dataout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[2]~223 ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[2]~223 ; pexpout          ;
; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[3]~226 ; |serialport|baud_div:inst5|lpm_counter:delay_counter_rtl_0|dffs[3]~226 ; pexpout          ;
; |serialport|rtl~407                                                    ; |serialport|rtl~407                                                    ; pexpout          ;
; |serialport|rtl~411                                                    ; |serialport|rtl~411                                                    ; pexpout          ;
; |serialport|serialport_tx:inst7|bit_index~247                          ; |serialport|serialport_tx:inst7|bit_index~247                          ; pexpout          ;
; |serialport|baud_div:inst5|baudrate_clock~14                           ; |serialport|baud_div:inst5|baudrate_clock~14                           ; pexpout          ;
; |serialport|baud_div:inst5|baudrate_clock~19                           ; |serialport|baud_div:inst5|baudrate_clock~19                           ; pexpout          ;
; |serialport|bitnum[2]                                                  ; |serialport|bitnum[2]                                                  ; dataout          ;
; |serialport|bitnum[1]                                                  ; |serialport|bitnum[1]                                                  ; dataout          ;
; |serialport|bitnum[0]                                                  ; |serialport|bitnum[0]                                                  ; dataout          ;
; |serialport|bcd_data[3]                                                ; |serialport|bcd_data[3]                                                ; dataout          ;
; |serialport|bcd_data[2]                                                ; |serialport|bcd_data[2]                                                ; dataout          ;
; |serialport|bcd_data[1]                                                ; |serialport|bcd_data[1]                                                ; dataout          ;
; |serialport|bcd_data[0]                                                ; |serialport|bcd_data[0]                                                ; dataout          ;
; |serialport|clock_24M                                                  ; |serialport|clock_24M                                                  ; dataout          ;
; |serialport|baudrate[3]                                                ; |serialport|baudrate[3]                                                ; dataout          ;
; |serialport|baudrate[2]                                                ; |serialport|baudrate[2]                                                ; dataout          ;
; |serialport|baudrate[1]                                                ; |serialport|baudrate[1]                                                ; dataout          ;
; |serialport|baudrate[0]                                                ; |serialport|baudrate[0]                                                ; dataout          ;
+------------------------------------------------------------------------+------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                                                                                                           ;
+------------------------------------------------------------------------+------------------------------------------------------------------------+------------------+
; Node Name                                                              ; Output Port Name                                                       ; Output Port Type ;