ledarray8_8.hier_info

VHDL基础的编程源代码

|LedArray8_8
row[0] <= ledarray_drv:inst7.row0
row[1] <= ledarray_drv:inst7.row1
row[2] <= ledarray_drv:inst7.row2
row[3] <= ledarray_drv:inst7.row3
row[4] <= ledarray_drv:inst7.row4
row[5] <= ledarray_drv:inst7.row5
row[6] <= ledarray_drv:inst7.row6
row[7] <= ledarray_drv:inst7.row7
clock => counter:inst.clock
reset => counter:inst.reset
reset => ledarray_drv:inst7.reset
reset => charlib8_8:inst6.reset
reset => bcd_ascii:inst2.reset
reset => choice1from2:inst1.reset
reset => counter:inst3.reset
reset => counter:inst4.reset
reset => counter:inst5.reset
auto => charlib8_8:inst6.mode
timer => choice1from2:inst1.choice
row_select[0] <= ledarray_drv:inst7.row_select[0]
row_select[1] <= ledarray_drv:inst7.row_select[1]
row_select[2] <= ledarray_drv:inst7.row_select[2]
row_select[3] <= ledarray_drv:inst7.row_select[3]
row_select[4] <= ledarray_drv:inst7.row_select[4]
row_select[5] <= ledarray_drv:inst7.row_select[5]
row_select[6] <= ledarray_drv:inst7.row_select[6]
row_select[7] <= ledarray_drv:inst7.row_select[7]


|LedArray8_8|ledarray_drv:inst7
row[0] <= row[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[1] <= row[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[2] <= row[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[3] <= row[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[4] <= row[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[5] <= row[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[6] <= row[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[7] <= row[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row_select[0] <= row_select[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row_select[1] <= row_select[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row_select[2] <= row_select[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row_select[3] <= row_select[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row_select[4] <= row_select[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row_select[5] <= row_select[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row_select[6] <= row_select[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row_select[7] <= row_select[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row0[0] => row~7.IN0
row0[1] => row~6.IN0
row0[2] => row~5.IN0
row0[3] => row~4.IN0
row0[4] => row~3.IN0
row0[5] => row~2.IN0
row0[6] => row~1.IN0
row0[7] => row~0.IN0
row1[0] => row~15.IN0
row1[1] => row~14.IN0
row1[2] => row~13.IN0
row1[3] => row~12.IN0
row1[4] => row~11.IN0
row1[5] => row~10.IN0
row1[6] => row~9.IN0
row1[7] => row~8.IN0
row2[0] => row~23.IN0
row2[1] => row~22.IN0
row2[2] => row~21.IN0
row2[3] => row~20.IN0
row2[4] => row~19.IN0
row2[5] => row~18.IN0
row2[6] => row~17.IN0
row2[7] => row~16.IN0
row3[0] => row~31.IN0
row3[1] => row~30.IN0
row3[2] => row~29.IN0
row3[3] => row~28.IN0
row3[4] => row~27.IN0
row3[5] => row~26.IN0
row3[6] => row~25.IN0
row3[7] => row~24.IN0
row4[0] => row~39.IN0
row4[1] => row~38.IN0
row4[2] => row~37.IN0
row4[3] => row~36.IN0
row4[4] => row~35.IN0
row4[5] => row~34.IN0
row4[6] => row~33.IN0
row4[7] => row~32.IN0
row5[0] => row~47.IN0
row5[1] => row~46.IN0
row5[2] => row~45.IN0
row5[3] => row~44.IN0
row5[4] => row~43.IN0
row5[5] => row~42.IN0
row5[6] => row~41.IN0
row5[7] => row~40.IN0
row6[0] => row~55.IN0
row6[1] => row~54.IN0
row6[2] => row~53.IN0
row6[3] => row~52.IN0
row6[4] => row~51.IN0
row6[5] => row~50.IN0
row6[6] => row~49.IN0
row6[7] => row~48.IN0
row7[0] => row~63.IN0
row7[1] => row~62.IN0
row7[2] => row~61.IN0
row7[3] => row~60.IN0
row7[4] => row~59.IN0
row7[5] => row~58.IN0
row7[6] => row~57.IN0
row7[7] => row~56.IN0
clock => row_select[6]~reg0.CLK
clock => row_select[5]~reg0.CLK
clock => row_select[4]~reg0.CLK
clock => row_select[3]~reg0.CLK
clock => row_select[2]~reg0.CLK
clock => row_select[1]~reg0.CLK
clock => row_select[0]~reg0.CLK
clock => row[7]~reg0.CLK
clock => row[6]~reg0.CLK
clock => row[5]~reg0.CLK
clock => row[4]~reg0.CLK
clock => row[3]~reg0.CLK
clock => row[2]~reg0.CLK
clock => row[1]~reg0.CLK
clock => row[0]~reg0.CLK
clock => next_cs[7].CLK
clock => next_cs[6].CLK
clock => next_cs[5].CLK
clock => next_cs[4].CLK
clock => next_cs[3].CLK
clock => next_cs[2].CLK
clock => next_cs[1].CLK
clock => next_cs[0].CLK
clock => row_select[7]~reg0.CLK
reset => process0~0.IN0


|LedArray8_8|counter:inst
clock => delay_counter[14].CLK
clock => delay_counter[13].CLK
clock => delay_counter[12].CLK
clock => delay_counter[11].CLK
clock => delay_counter[10].CLK
clock => delay_counter[9].CLK
clock => delay_counter[8].CLK
clock => delay_counter[7].CLK
clock => delay_counter[6].CLK
clock => delay_counter[5].CLK
clock => delay_counter[4].CLK
clock => delay_counter[3].CLK
clock => delay_counter[2].CLK
clock => delay_counter[1].CLK
clock => delay_counter[0].CLK
clock => counter[3]~reg0.CLK
clock => counter[2]~reg0.CLK
clock => counter[1]~reg0.CLK
clock => counter[0]~reg0.CLK
clock => carrier~reg0.CLK
reset => process0~0.IN0
counter[0] <= counter[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter[1] <= counter[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter[2] <= counter[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter[3] <= counter[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
carrier <= carrier~reg0.DB_MAX_OUTPUT_PORT_TYPE


|LedArray8_8|charlib8_8:inst6
row0[0] <= <GND>
row0[1] <= <GND>
row0[2] <= row0~7.DB_MAX_OUTPUT_PORT_TYPE
row0[3] <= row0~6.DB_MAX_OUTPUT_PORT_TYPE
row0[4] <= row0~5.DB_MAX_OUTPUT_PORT_TYPE
row0[5] <= row0~4.DB_MAX_OUTPUT_PORT_TYPE
row0[6] <= <GND>
row0[7] <= <GND>
row1[0] <= <GND>
row1[1] <= <GND>
row1[2] <= row1~7.DB_MAX_OUTPUT_PORT_TYPE
row1[3] <= row1~6.DB_MAX_OUTPUT_PORT_TYPE
row1[4] <= row1~5.DB_MAX_OUTPUT_PORT_TYPE
row1[5] <= row1~4.DB_MAX_OUTPUT_PORT_TYPE
row1[6] <= row1~3.DB_MAX_OUTPUT_PORT_TYPE
row1[7] <= <GND>
row2[0] <= <GND>
row2[1] <= <GND>
row2[2] <= row2~7.DB_MAX_OUTPUT_PORT_TYPE
row2[3] <= row2~6.DB_MAX_OUTPUT_PORT_TYPE
row2[4] <= row2~5.DB_MAX_OUTPUT_PORT_TYPE
row2[5] <= row2~4.DB_MAX_OUTPUT_PORT_TYPE
row2[6] <= row2~3.DB_MAX_OUTPUT_PORT_TYPE
row2[7] <= <GND>
row3[0] <= <GND>
row3[1] <= <GND>
row3[2] <= row3~7.DB_MAX_OUTPUT_PORT_TYPE
row3[3] <= row3~6.DB_MAX_OUTPUT_PORT_TYPE
row3[4] <= row3~5.DB_MAX_OUTPUT_PORT_TYPE
row3[5] <= row3~4.DB_MAX_OUTPUT_PORT_TYPE
row3[6] <= row3~3.DB_MAX_OUTPUT_PORT_TYPE
row3[7] <= <GND>
row4[0] <= <GND>
row4[1] <= <GND>
row4[2] <= row4~7.DB_MAX_OUTPUT_PORT_TYPE
row4[3] <= row4~6.DB_MAX_OUTPUT_PORT_TYPE
row4[4] <= row4~5.DB_MAX_OUTPUT_PORT_TYPE
row4[5] <= <GND>
row4[6] <= row4~4.DB_MAX_OUTPUT_PORT_TYPE
row4[7] <= <GND>
row5[0] <= <GND>
row5[1] <= <GND>
row5[2] <= row5~6.DB_MAX_OUTPUT_PORT_TYPE
row5[3] <= row5~5.DB_MAX_OUTPUT_PORT_TYPE
row5[4] <= row5~4.DB_MAX_OUTPUT_PORT_TYPE
row5[5] <= row5~3.DB_MAX_OUTPUT_PORT_TYPE
row5[6] <= row5~2.DB_MAX_OUTPUT_PORT_TYPE
row5[7] <= <GND>
row6[0] <= <GND>
row6[1] <= row6~6.DB_MAX_OUTPUT_PORT_TYPE
row6[2] <= row6~5.DB_MAX_OUTPUT_PORT_TYPE
row6[3] <= row6~4.DB_MAX_OUTPUT_PORT_TYPE
row6[4] <= row6~3.DB_MAX_OUTPUT_PORT_TYPE
row6[5] <= row6~2.DB_MAX_OUTPUT_PORT_TYPE
row6[6] <= row6~1.DB_MAX_OUTPUT_PORT_TYPE
row6[7] <= <GND>
row7[0] <= <GND>
row7[1] <= <GND>
row7[2] <= row7~6.DB_MAX_OUTPUT_PORT_TYPE
row7[3] <= row7~5.DB_MAX_OUTPUT_PORT_TYPE
row7[4] <= row7~4.DB_MAX_OUTPUT_PORT_TYPE
row7[5] <= row7~3.DB_MAX_OUTPUT_PORT_TYPE
row7[6] <= row7~2.DB_MAX_OUTPUT_PORT_TYPE
row7[7] <= <GND>
ext_char_data[0] => Mux~1.IN263
ext_char_data[0] => Mux~2.IN263
ext_char_data[0] => Mux~3.IN263
ext_char_data[0] => Mux~4.IN263
ext_char_data[0] => Mux~5.IN263
ext_char_data[0] => Mux~6.IN263
ext_char_data[0] => Mux~7.IN263
ext_char_data[0] => Mux~9.IN134
ext_char_data[0] => Mux~10.IN134
ext_char_data[0] => Mux~11.IN263
ext_char_data[0] => Mux~12.IN134
ext_char_data[0] => Mux~13.IN134
ext_char_data[0] => Mux~14.IN263
ext_char_data[0] => Mux~15.IN263
ext_char_data[0] => Mux~16.IN263
ext_char_data[0] => Mux~17.IN263
ext_char_data[0] => Mux~18.IN263
ext_char_data[0] => Mux~19.IN263
ext_char_data[0] => Mux~20.IN263
ext_char_data[1] => Mux~1.IN262
ext_char_data[1] => Mux~2.IN262
ext_char_data[1] => Mux~3.IN262
ext_char_data[1] => Mux~4.IN262
ext_char_data[1] => Mux~5.IN262
ext_char_data[1] => Mux~6.IN262
ext_char_data[1] => Mux~7.IN262
ext_char_data[1] => Mux~8.IN134
ext_char_data[1] => Mux~9.IN133