ledarray8_8.tan.rpt

VHDL基础的编程源代码

; Use Fast Timing Models                                ; Off                ;      ;    ;             ;
; Report IO Paths Separately                            ; Off                ;      ;    ;             ;
; Default hold multicycle                               ; Same As Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                      ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements               ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;    ;             ;
; Enable Clock Latency                                  ; Off                ;      ;    ;             ;
+-------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; clock           ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clock'                                                                                                                                                                                                                                                          ;
+-----------------------------------------+-----------------------------------------------------+--------------------------------+----------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                           ; To                               ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+--------------------------------+----------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 30.12 MHz ( period = 33.200 ns )                    ; counter:inst5|counter[0]       ; ledarray_drv:inst7|row[5]        ; clock      ; clock    ; None                        ; None                      ; 15.800 ns               ;
; N/A                                     ; 30.12 MHz ( period = 33.200 ns )                    ; counter:inst5|counter[1]       ; ledarray_drv:inst7|row[5]        ; clock      ; clock    ; None                        ; None                      ; 15.800 ns               ;
; N/A                                     ; 30.12 MHz ( period = 33.200 ns )                    ; counter:inst5|counter[2]       ; ledarray_drv:inst7|row[5]        ; clock      ; clock    ; None                        ; None                      ; 15.800 ns               ;
; N/A                                     ; 30.12 MHz ( period = 33.200 ns )                    ; counter:inst5|counter[3]       ; ledarray_drv:inst7|row[5]        ; clock      ; clock    ; None                        ; None                      ; 15.800 ns               ;
; N/A                                     ; 31.85 MHz ( period = 31.400 ns )                    ; counter:inst5|counter[0]       ; ledarray_drv:inst7|row[4]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 31.85 MHz ( period = 31.400 ns )                    ; counter:inst5|counter[1]       ; ledarray_drv:inst7|row[4]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 31.85 MHz ( period = 31.400 ns )                    ; counter:inst5|counter[2]       ; ledarray_drv:inst7|row[4]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 31.85 MHz ( period = 31.400 ns )                    ; counter:inst5|counter[3]       ; ledarray_drv:inst7|row[4]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 31.85 MHz ( period = 31.400 ns )                    ; counter:inst5|counter[0]       ; ledarray_drv:inst7|row[2]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 31.85 MHz ( period = 31.400 ns )                    ; counter:inst5|counter[1]       ; ledarray_drv:inst7|row[2]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 31.85 MHz ( period = 31.400 ns )                    ; counter:inst5|counter[2]       ; ledarray_drv:inst7|row[2]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 31.85 MHz ( period = 31.400 ns )                    ; counter:inst5|counter[3]       ; ledarray_drv:inst7|row[2]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 32.79 MHz ( period = 30.500 ns )                    ; counter:inst5|counter[0]       ; ledarray_drv:inst7|row[3]        ; clock      ; clock    ; None                        ; None                      ; 13.100 ns               ;
; N/A                                     ; 32.79 MHz ( period = 30.500 ns )                    ; counter:inst5|counter[1]       ; ledarray_drv:inst7|row[3]        ; clock      ; clock    ; None                        ; None                      ; 13.100 ns               ;
; N/A                                     ; 32.79 MHz ( period = 30.500 ns )                    ; counter:inst5|counter[2]       ; ledarray_drv:inst7|row[3]        ; clock      ; clock    ; None                        ; None                      ; 13.100 ns               ;
; N/A                                     ; 32.79 MHz ( period = 30.500 ns )                    ; counter:inst5|counter[0]       ; ledarray_drv:inst7|row[6]        ; clock      ; clock    ; None                        ; None                      ; 13.100 ns               ;
; N/A                                     ; 32.79 MHz ( period = 30.500 ns )                    ; counter:inst5|counter[1]       ; ledarray_drv:inst7|row[6]        ; clock      ; clock    ; None                        ; None                      ; 13.100 ns               ;
; N/A                                     ; 32.79 MHz ( period = 30.500 ns )                    ; counter:inst5|counter[2]       ; ledarray_drv:inst7|row[6]        ; clock      ; clock    ; None                        ; None                      ; 13.100 ns               ;
; N/A                                     ; 32.79 MHz ( period = 30.500 ns )                    ; counter:inst5|counter[3]       ; ledarray_drv:inst7|row[6]        ; clock      ; clock    ; None                        ; None                      ; 13.100 ns               ;
; N/A                                     ; 36.63 MHz ( period = 27.300 ns )                    ; counter:inst5|counter[3]       ; ledarray_drv:inst7|row[3]        ; clock      ; clock    ; None                        ; None                      ; 9.900 ns                ;
; N/A                                     ; 38.61 MHz ( period = 25.900 ns )                    ; counter:inst4|counter[0]       ; ledarray_drv:inst7|row[5]        ; clock      ; clock    ; None                        ; None                      ; 14.900 ns               ;
; N/A                                     ; 38.61 MHz ( period = 25.900 ns )                    ; counter:inst4|counter[1]       ; ledarray_drv:inst7|row[5]        ; clock      ; clock    ; None                        ; None                      ; 14.900 ns               ;
; N/A                                     ; 38.61 MHz ( period = 25.900 ns )                    ; counter:inst4|counter[2]       ; ledarray_drv:inst7|row[5]        ; clock      ; clock    ; None                        ; None                      ; 14.900 ns               ;
; N/A                                     ; 38.76 MHz ( period = 25.800 ns )                    ; counter:inst4|counter[3]       ; ledarray_drv:inst7|row[5]        ; clock      ; clock    ; None                        ; None                      ; 14.800 ns               ;
; N/A                                     ; 40.00 MHz ( period = 25.000 ns )                    ; counter:inst4|counter[0]       ; ledarray_drv:inst7|row[4]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 40.00 MHz ( period = 25.000 ns )                    ; counter:inst4|counter[1]       ; ledarray_drv:inst7|row[4]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 40.00 MHz ( period = 25.000 ns )                    ; counter:inst4|counter[2]       ; ledarray_drv:inst7|row[4]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 40.00 MHz ( period = 25.000 ns )                    ; counter:inst4|counter[0]       ; ledarray_drv:inst7|row[2]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 40.00 MHz ( period = 25.000 ns )                    ; counter:inst4|counter[1]       ; ledarray_drv:inst7|row[2]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 40.00 MHz ( period = 25.000 ns )                    ; counter:inst4|counter[2]       ; ledarray_drv:inst7|row[2]        ; clock      ; clock    ; None                        ; None                      ; 14.000 ns               ;
; N/A                                     ; 40.16 MHz ( period = 24.900 ns )                    ; counter:inst4|counter[3]       ; ledarray_drv:inst7|row[4]        ; clock      ; clock    ; None                        ; None                      ; 13.900 ns               ;
; N/A                                     ; 40.16 MHz ( period = 24.900 ns )                    ; counter:inst4|counter[3]       ; ledarray_drv:inst7|row[2]        ; clock      ; clock    ; None                        ; None                      ; 13.900 ns               ;
; N/A                                     ; 41.49 MHz ( period = 24.100 ns )                    ; counter:inst4|counter[0]       ; ledarray_drv:inst7|row[3]        ; clock      ; clock    ; None                        ; None                      ; 13.100 ns               ;
; N/A                                     ; 41.49 MHz ( period = 24.100 ns )                    ; counter:inst4|counter[1]       ; ledarray_drv:inst7|row[3]        ; clock      ; clock    ; None                        ; None                      ; 13.100 ns               ;
; N/A                                     ; 41.49 MHz ( period = 24.100 ns )                    ; counter:inst4|counter[2]       ; ledarray_drv:inst7|row[3]        ; clock      ; clock    ; None                        ; None                      ; 13.100 ns               ;