📄 digital6counter.qsf
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# Copyright (C) 1991-2004 Altera Corporation
# Any megafunction design, and related netlist (encrypted or decrypted),
# support information, device programming or simulation file, and any other
# associated documentation or information provided by Altera or a partner
# under Altera's Megafunction Partnership Program may be used only
# to program PLD devices (but not masked PLD devices) from Altera. Any
# other use of such megafunction design, netlist, support information,
# device programming or simulation file, or any other related documentation
# or information is prohibited for any other purpose, including, but not
# limited to modification, reverse engineering, de-compiling, or use with
# any other silicon devices, unless such use is explicitly licensed under
# a separate agreement with Altera or a megafunction partner. Title to the
# intellectual property, including patents, copyrights, trademarks, trade
# secrets, or maskworks, embodied in any such megafunction design, netlist,
# support information, device programming or simulation file, or any other
# related documentation or information provided by Altera or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.
# The default values for assignments are stored in the file
# Digital6Counter_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
# assignment_defaults.qdf
# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:35:40 OCTOBER 11, 2006"
set_global_assignment -name LAST_QUARTUS_VERSION 5.1
set_global_assignment -name VHDL_FILE counter.vhd
set_global_assignment -name VHDL_FILE leddrv.vhd
set_global_assignment -name BDF_FILE Digital6Counter.bdf
set_global_assignment -name VHDL_FILE choice1from6.vhd
set_global_assignment -name VHDL_FILE seg7_leddrv.vhd
# Pin & Location Assignments
# ==========================
set_location_assignment PIN_87 -to clock
set_location_assignment PIN_89 -to reset
set_location_assignment PIN_75 -to led_bits[7]
set_location_assignment PIN_72 -to led_bits[6]
set_location_assignment PIN_71 -to led_bits[5]
set_location_assignment PIN_70 -to led_bits[4]
set_location_assignment PIN_69 -to led_bits[3]
set_location_assignment PIN_68 -to led_bits[2]
set_location_assignment PIN_67 -to led_bits[1]
set_location_assignment PIN_64 -to led_bits[0]
set_location_assignment PIN_76 -to seg7led_bits[0]
set_location_assignment PIN_77 -to seg7led_bits[1]
set_location_assignment PIN_79 -to seg7led_bits[2]
set_location_assignment PIN_80 -to seg7led_bits[3]
set_location_assignment PIN_81 -to seg7led_bits[4]
set_location_assignment PIN_83 -to seg7led_bits[5]
set_location_assignment PIN_84 -to seg7led_bits[6]
set_location_assignment PIN_85 -to seg7led_bits[7]
set_location_assignment PIN_98 -to led_cs[5]
set_location_assignment PIN_97 -to led_cs[4]
set_location_assignment PIN_96 -to led_cs[3]
set_location_assignment PIN_94 -to led_cs[2]
set_location_assignment PIN_93 -to led_cs[1]
set_location_assignment PIN_92 -to led_cs[0]
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 10
set_global_assignment -name FAMILY MAX3000A
set_global_assignment -name TOP_LEVEL_ENTITY Digital6Counter
# Fitter Assignments
# ==================
set_global_assignment -name DEVICE "EPM3128ATC100-10"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
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