📄 digital6counter.fit.rpt
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; counter:inst7|delay_counter[0] ; 5 ;
; counter:inst5|delay_counter[0] ; 5 ;
; counter:inst4|delay_counter[0] ; 5 ;
; counter:inst3|delay_counter[0] ; 5 ;
; counter:inst2|delay_counter[0] ; 5 ;
; counter:inst1|delay_counter[6] ; 5 ;
; counter:inst1|delay_counter[5] ; 5 ;
; counter:inst1|delay_counter[4] ; 5 ;
; counter:inst6|counter[1] ; 4 ;
; counter:inst6|counter[0] ; 4 ;
; counter:inst7|carrier ; 4 ;
+-----------------------------------+---------+
+-------------------------------------------------+
; Interconnect Usage Summary ;
+----------------------------+--------------------+
; Interconnect Resource Type ; Usage ;
+----------------------------+--------------------+
; Output enables ; 0 / 6 ( 0 % ) ;
; PIA buffers ; 121 / 288 ( 42 % ) ;
; PIAs ; 126 / 288 ( 44 % ) ;
+----------------------------+--------------------+
+-----------------------------------------------------------------------------+
; LAB External Interconnect ;
+-----------------------------------------------+-----------------------------+
; LAB External Interconnects (Average = 15.75) ; Number of LABs (Total = 8) ;
+-----------------------------------------------+-----------------------------+
; 0 - 1 ; 0 ;
; 2 - 3 ; 0 ;
; 4 - 5 ; 0 ;
; 6 - 7 ; 0 ;
; 8 - 9 ; 1 ;
; 10 - 11 ; 1 ;
; 12 - 13 ; 1 ;
; 14 - 15 ; 2 ;
; 16 - 17 ; 0 ;
; 18 - 19 ; 1 ;
; 20 - 21 ; 0 ;
; 22 - 23 ; 2 ;
+-----------------------------------------------+-----------------------------+
+-----------------------------------------------------------------------+
; LAB Macrocells ;
+-----------------------------------------+-----------------------------+
; Number of Macrocells (Average = 13.88) ; Number of LABs (Total = 8) ;
+-----------------------------------------+-----------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 1 ;
; 9 ; 1 ;
; 10 ; 0 ;
; 11 ; 0 ;
; 12 ; 0 ;
; 13 ; 0 ;
; 14 ; 0 ;
; 15 ; 2 ;
; 16 ; 4 ;
+-----------------------------------------+-----------------------------+
+---------------------------------------------------------+
; Parallel Expander ;
+--------------------------+------------------------------+
; Parallel Expander Length ; Number of Parallel Expanders ;
+--------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 6 ;
+--------------------------+------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection ;
+-----+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LAB ; Logic Cell ; Input ; Output ;
+-----+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; A ; LC10 ; reset, counter:inst2|counter[3], counter:inst2|counter[2], counter:inst2|counter[1], counter:inst2|counter[0], counter:inst1|carrier ; counter:inst2|counter[1], counter:inst2|counter[2], leddrv:inst10|Mux~491, counter:inst2|counter[3], leddrv:inst10|Mux~494, leddrv:inst10|Mux~498, leddrv:inst10|Mux~505, leddrv:inst10|Mux~510, leddrv:inst10|Mux~517, leddrv:inst10|Mux~523, leddrv:inst10|Mux~530, choice1from6:inst8|led_bits[1] ;
; A ; LC7 ; reset, counter:inst2|counter[1], counter:inst2|counter[0], counter:inst1|carrier ; counter:inst2|counter[1], leddrv:inst10|Mux~491, counter:inst2|counter[3], leddrv:inst10|Mux~494, leddrv:inst10|Mux~498, leddrv:inst10|Mux~505, leddrv:inst10|Mux~510, leddrv:inst10|Mux~517, leddrv:inst10|Mux~523, leddrv:inst10|Mux~530, choice1from6:inst8|led_bits[2] ;
; A ; LC5 ; reset, counter:inst2|counter[2], counter:inst2|counter[1], counter:inst2|counter[3], counter:inst2|counter[0], counter:inst1|carrier ; counter:inst2|counter[1], counter:inst2|counter[3], leddrv:inst10|Mux~494, leddrv:inst10|Mux~498, leddrv:inst10|Mux~505, leddrv:inst10|Mux~510, leddrv:inst10|Mux~517, leddrv:inst10|Mux~523, leddrv:inst10|Mux~530, choice1from6:inst8|led_bits[3] ;
; A ; LC8 ; choice1from6:inst8|next_led_cs[5], counter:inst|carrier, reset ; led_cs[5] ;
; A ; LC9 ; choice1from6:inst8|next_led_cs[4], counter:inst|carrier, reset ; led_cs[4] ;
; A ; LC3 ; counter:inst7|counter[0], choice1from6:inst8|next_led_cs[4], choice1from6:inst8|next_led_cs[5], choice1from6:inst8|next_led_cs[2], choice1from6:inst8|next_led_cs[1], choice1from6:inst8|next_led_cs[3], choice1from6:inst8|next_led_cs[0], counter:inst6|counter[0] ; choice1from6:inst8|led_bits[0] ;
; A ; LC11 ; choice1from6:inst8|next_led_cs[3], counter:inst|carrier, reset ; led_cs[3] ;
; A ; LC1 ; counter:inst7|counter[1], choice1from6:inst8|next_led_cs[4], choice1from6:inst8|next_led_cs[5], choice1from6:inst8|next_led_cs[2], choice1from6:inst8|next_led_cs[3], choice1from6:inst8|next_led_cs[1], choice1from6:inst8|next_led_cs[0], counter:inst6|counter[1] ; choice1from6:inst8|led_bits[1] ;
; A ; LC13 ; choice1from6:inst8|next_led_cs[2], counter:inst|carrier, reset ; led_cs[2] ;
; A ; LC2 ; reset, choice1from6:inst8|Mux~3895, counter:inst4|counter[1], choice1from6:inst8|next_led_cs[4], choice1from6:inst8|next_led_cs[5], choice1from6:inst8|next_led_cs[2], choice1from6:inst8|next_led_cs[3], choice1from6:inst8|next_led_cs[1], choice1from6:inst8|next_led_cs[0], counter:inst5|counter[1], counter:inst2|counter[1], counter:inst3|counter[1], counter:inst|carrier ; seg7_leddrv:inst9|Mux~1241, seg7_leddrv:inst9|Mux~1246, seg7_leddrv:inst9|Mux~1252, seg7_leddrv:inst9|Mux~1258, seg7_leddrv:inst9|Mux~1264, seg7_leddrv:inst9|Mux~1269, seg7_leddrv:inst9|Mux~1275 ;
; A ; LC12 ; reset, choice1from6:inst8|next_led_cs[0], choice1from6:inst8|next_led_cs[4], choice1from6:inst8|next_led_cs[5], choice1from6:inst8|next_led_cs[2], choice1from6:inst8|next_led_cs[3], choice1from6:inst8|next_led_cs[1], counter:inst|carrier ; choice1from6:inst8|next_led_cs[1], choice1from6:inst8|next_led_cs[0], choice1from6:inst8|next_led_cs[2], choice1from6:inst8|led_cs[2], choice1from6:inst8|next_led_cs[3], choice1from6:inst8|next_led_cs[4], choice1from6:inst8|next_led_cs[5], choice1from6:inst8|led_bits[0], choice1from6:inst8|led_bits[1], choice1from6:inst8|led_bits[2], choice1from6:inst8|led_bits[3], choice1from6:inst8|Mux~3890, choice1from6:inst8|Mux~3892, choice1from6:inst8|Mux~3895, choice1from6:inst8|Mux~3898, choice1from6:inst8|Mux~3901 ;
; A ; LC16 ; choice1from6:inst8|next_led_cs[0], counter:inst|carrier, reset ; led_cs[0] ;
; A ; LC4 ; reset, choice1from6:inst8|Mux~3892, counter:inst4|counter[0], choice1from6:inst8|next_led_cs[4], choice1from6:inst8|next_led_cs[5], choice1from6:inst8|next_led_cs[2], choice1from6:inst8|next_led_cs[1], choice1from6:inst8|next_led_cs[3], choice1from6:inst8|next_led_cs[0], counter:inst5|counter[0], counter:inst2|counter[0], counter:inst3|counter[0], counter:inst|carrier ; seg7_leddrv:inst9|Mux~1241, seg7_leddrv:inst9|Mux~1246, seg7_leddrv:inst9|Mux~1252, seg7_leddrv:inst9|Mux~1258, seg7_leddrv:inst9|Mux~1264, seg7_leddrv:inst9|Mux~1269, seg7_leddrv:inst9|Mux~1275 ;
; A ; LC14 ; choice1from6:inst8|next_led_cs[1], counter:inst|carrier, reset ; led_cs[1], seg7_leddrv:inst9|seg7led_bits[7]~10 ;
; A ; LC15 ; reset, choice1from6:inst8|next_led_cs[0], choice1from6:inst8|next_led_cs[4], choice1from6:inst8|next_led_cs[5], choice1from6:inst8|next_led_cs[2], choice1from6:inst8|next_led_cs[3], choice1from6:inst8|next_led_cs[1], counter:inst|carrier ; choice1from6:inst8|next_led_cs[1], choice1from6:inst8|led_cs[1], choice1from6:inst8|next_led_cs[0], choice1from6:inst8|next_led_cs[2], choice1from6:inst8|next_led_cs[3], choice1from6:inst8|next_led_cs[4], choice1from6:inst8|next_led_cs[5], choice1from6:inst8|led_bits[0], choice1from6:inst8|led_bits[1], choice1from6:inst8|led_bits[2], choice1from6:inst8|led_bits[3], choice1from6:inst8|Mux~3890, choice1from6:inst8|Mux~3892, choice1from6:inst8|Mux~3895, choice1from6:inst8|Mux~3898, choice1from6:inst8|Mux~3901 ;
; B ; LC32 ; clock, reset, counter:inst|delay_counter[1], counter:inst|delay_counter[0] ; counter:inst|delay_counter[1], counter:inst|delay_counter[2], counter:inst|delay_counter[3], counter:inst|delay_counter[4], counter:inst|delay_counter[5], counter:inst|delay_counter[6], counter:inst|delay_counter[7], counter:inst|delay_counter[8], counter:inst|delay_counter[9], counter:inst|delay_counter[10], counter:inst|delay_counter[11], counter:inst|delay_counter[12], counter:inst|delay_counter[13], counter:inst|delay_counter[14], counter:inst|carrier, counter:inst|delay_counter~392 ;
; B ; LC17 ; counter:inst|delay_counter[14], counter:inst|delay_counter[13], counter:inst|delay_counter[12], counter:inst|delay_counter[11], counter:inst|delay_counter[10], counter:inst|delay_counter[9], counter:inst|delay_counter[8], counter:inst|delay_counter[7], counter:inst|⌨️ 快捷键说明
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