📄 pwm_measure.sim.rpt
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; |pwm_measure|led_bits[7] ; |pwm_measure|led_bits[7] ; padio ;
+---------------------------------------------------------------+---------------------------------------------------------------+------------------+
The following table displays output ports that do not toggle to 1 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+------------------+
; |pwm_measure|pwm_counter:inst|delay_counter[8] ; |pwm_measure|pwm_counter:inst|delay_counter[8] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[9] ; |pwm_measure|pwm_counter:inst|delay_counter[9] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[10] ; |pwm_measure|pwm_counter:inst|delay_counter[10] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[11] ; |pwm_measure|pwm_counter:inst|delay_counter[11] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[12] ; |pwm_measure|pwm_counter:inst|delay_counter[12] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[13] ; |pwm_measure|pwm_counter:inst|delay_counter[13] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[14] ; |pwm_measure|pwm_counter:inst|delay_counter[14] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[15] ; |pwm_measure|pwm_counter:inst|delay_counter[15] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[16] ; |pwm_measure|pwm_counter:inst|delay_counter[16] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[17] ; |pwm_measure|pwm_counter:inst|delay_counter[17] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[18] ; |pwm_measure|pwm_counter:inst|delay_counter[18] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[19] ; |pwm_measure|pwm_counter:inst|delay_counter[19] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[20] ; |pwm_measure|pwm_counter:inst|delay_counter[20] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[21] ; |pwm_measure|pwm_counter:inst|delay_counter[21] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[22] ; |pwm_measure|pwm_counter:inst|delay_counter[22] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[23] ; |pwm_measure|pwm_counter:inst|delay_counter[23] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[24] ; |pwm_measure|pwm_counter:inst|delay_counter[24] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[25] ; |pwm_measure|pwm_counter:inst|delay_counter[25] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[26] ; |pwm_measure|pwm_counter:inst|delay_counter[26] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[27] ; |pwm_measure|pwm_counter:inst|delay_counter[27] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[28] ; |pwm_measure|pwm_counter:inst|delay_counter[28] ; dataout ;
; |pwm_measure|pwm_counter:inst|lpm_add_sub:add_rtl_2|addcore:adder[3]|pc[4]~62 ; |pwm_measure|pwm_counter:inst|lpm_add_sub:add_rtl_2|addcore:adder[3]|pc[4]~62 ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[29] ; |pwm_measure|pwm_counter:inst|delay_counter[29] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[30] ; |pwm_measure|pwm_counter:inst|delay_counter[30] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[31] ; |pwm_measure|pwm_counter:inst|delay_counter[31] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[6] ; |pwm_measure|pwm_m:inst2|TH_value[6] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[5] ; |pwm_measure|pwm_m:inst2|TH_value[5] ; dataout ;
; |pwm_measure|pwm_m:inst2|TL_value[5] ; |pwm_measure|pwm_m:inst2|TL_value[5] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[2] ; |pwm_measure|pwm_m:inst2|TH_value[2] ; dataout ;
; |pwm_measure|pwm_m:inst2|TL_value[2] ; |pwm_measure|pwm_m:inst2|TL_value[2] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[1] ; |pwm_measure|pwm_m:inst2|TH_value[1] ; dataout ;
; |pwm_measure|pwm_m:inst2|TL_value[1] ; |pwm_measure|pwm_m:inst2|TL_value[1] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[0] ; |pwm_measure|pwm_m:inst2|TH_value[0] ; dataout ;
; |pwm_measure|pwm_m:inst2|TL_value[0] ; |pwm_measure|pwm_m:inst2|TL_value[0] ; dataout ;
; |pwm_measure|pwm_m:inst2|lpm_counter:TH_counter_rtl_1|dffs[7] ; |pwm_measure|pwm_m:inst2|lpm_counter:TH_counter_rtl_1|dffs[7] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[7] ; |pwm_measure|pwm_m:inst2|TH_value[7] ; dataout ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+------------------+
The following table displays output ports that do not toggle to 0 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+------------------+
; |pwm_measure|pwm_counter:inst|delay_counter[8] ; |pwm_measure|pwm_counter:inst|delay_counter[8] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[9] ; |pwm_measure|pwm_counter:inst|delay_counter[9] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[10] ; |pwm_measure|pwm_counter:inst|delay_counter[10] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[11] ; |pwm_measure|pwm_counter:inst|delay_counter[11] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[12] ; |pwm_measure|pwm_counter:inst|delay_counter[12] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[13] ; |pwm_measure|pwm_counter:inst|delay_counter[13] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[14] ; |pwm_measure|pwm_counter:inst|delay_counter[14] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[15] ; |pwm_measure|pwm_counter:inst|delay_counter[15] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[16] ; |pwm_measure|pwm_counter:inst|delay_counter[16] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[17] ; |pwm_measure|pwm_counter:inst|delay_counter[17] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[18] ; |pwm_measure|pwm_counter:inst|delay_counter[18] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[19] ; |pwm_measure|pwm_counter:inst|delay_counter[19] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[20] ; |pwm_measure|pwm_counter:inst|delay_counter[20] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[21] ; |pwm_measure|pwm_counter:inst|delay_counter[21] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[22] ; |pwm_measure|pwm_counter:inst|delay_counter[22] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[23] ; |pwm_measure|pwm_counter:inst|delay_counter[23] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[24] ; |pwm_measure|pwm_counter:inst|delay_counter[24] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[25] ; |pwm_measure|pwm_counter:inst|delay_counter[25] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[26] ; |pwm_measure|pwm_counter:inst|delay_counter[26] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[27] ; |pwm_measure|pwm_counter:inst|delay_counter[27] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[28] ; |pwm_measure|pwm_counter:inst|delay_counter[28] ; dataout ;
; |pwm_measure|pwm_counter:inst|lpm_add_sub:add_rtl_2|addcore:adder[3]|pc[4]~62 ; |pwm_measure|pwm_counter:inst|lpm_add_sub:add_rtl_2|addcore:adder[3]|pc[4]~62 ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[29] ; |pwm_measure|pwm_counter:inst|delay_counter[29] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[30] ; |pwm_measure|pwm_counter:inst|delay_counter[30] ; dataout ;
; |pwm_measure|pwm_counter:inst|delay_counter[31] ; |pwm_measure|pwm_counter:inst|delay_counter[31] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[6] ; |pwm_measure|pwm_m:inst2|TH_value[6] ; dataout ;
; |pwm_measure|pwm_m:inst2|TL_value[6] ; |pwm_measure|pwm_m:inst2|TL_value[6] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[5] ; |pwm_measure|pwm_m:inst2|TH_value[5] ; dataout ;
; |pwm_measure|pwm_m:inst2|TL_value[5] ; |pwm_measure|pwm_m:inst2|TL_value[5] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[4] ; |pwm_measure|pwm_m:inst2|TH_value[4] ; dataout ;
; |pwm_measure|pwm_m:inst2|TL_value[4] ; |pwm_measure|pwm_m:inst2|TL_value[4] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[3] ; |pwm_measure|pwm_m:inst2|TH_value[3] ; dataout ;
; |pwm_measure|pwm_m:inst2|TL_value[3] ; |pwm_measure|pwm_m:inst2|TL_value[3] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[2] ; |pwm_measure|pwm_m:inst2|TH_value[2] ; dataout ;
; |pwm_measure|pwm_m:inst2|TL_value[2] ; |pwm_measure|pwm_m:inst2|TL_value[2] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[1] ; |pwm_measure|pwm_m:inst2|TH_value[1] ; dataout ;
; |pwm_measure|pwm_m:inst2|TL_value[1] ; |pwm_measure|pwm_m:inst2|TL_value[1] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[0] ; |pwm_measure|pwm_m:inst2|TH_value[0] ; dataout ;
; |pwm_measure|pwm_m:inst2|TL_value[0] ; |pwm_measure|pwm_m:inst2|TL_value[0] ; dataout ;
; |pwm_measure|pwm_m:inst2|lpm_counter:TH_counter_rtl_1|dffs[7] ; |pwm_measure|pwm_m:inst2|lpm_counter:TH_counter_rtl_1|dffs[7] ; dataout ;
; |pwm_measure|pwm_m:inst2|TH_value[7] ; |pwm_measure|pwm_m:inst2|TH_value[7] ; dataout ;
; |pwm_measure|pwm_m:inst2|TL_value[7] ; |pwm_measure|pwm_m:inst2|TL_value[7] ; dataout ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+------------------+
+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage ;
+--------+------------+
+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
Info: Version 5.1 Build 176 10/26/2005 SJ Full Version
Info: Processing started: Mon Mar 26 15:44:54 2007
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off pwm_measure -c pwm_measure
Warning: Compiler packed, optimized or synthesized away node "pwm_in". Ignored vector source file node.
Warning: Ignored node in vector source file. Can't find corresponding node name "pwm_m:inst2|TH_counter[4]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "pwm_m:inst2|TH_counter[3]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "pwm_m:inst2|TH_counter[2]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "pwm_m:inst2|TH_counter[1]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "pwm_m:inst2|TH_counter[0]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "pwm_m:inst2|TL_counter[4]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "pwm_m:inst2|TL_counter[3]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "pwm_m:inst2|TL_counter[2]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "pwm_m:inst2|TL_counter[1]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "pwm_m:inst2|TL_counter[0]" in design.
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is 44.74 %
Info: Number of transitions in simulation is 15929
Info: Quartus II Simulator was successful. 0 errors, 11 warnings
Info: Processing ended: Mon Mar 26 15:45:00 2007
Info: Elapsed time: 00:00:07
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