pwm_measure.fit.eqn

VHDL基础的编程源代码

--C1_TL_value[7] is pwm_m:inst2|TL_value[7] at LC27
C1_TL_value[7]_p1_out = reset & pwm_in & J1_dffs[7];
C1_TL_value[7]_p2_out = !reset & C1_TL_value[7];
C1_TL_value[7]_p3_out = !pwm_in & C1_TL_value[7];
C1_TL_value[7]_p4_out = C1_TL_value[7] & !J1_dffs[0] & !J1_dffs[21] & !J1_dffs[19] & !J1_dffs[4] & !J1_dffs[3] & !J1_dffs[5] & !J1_dffs[11] & !J1_dffs[2] & !J1_dffs[20] & !J1_dffs[9] & !J1_dffs[22] & !J1_dffs[6] & !J1_dffs[17] & !J1_dffs[1] & !J1_dffs[14] & !J1_dffs[10] & !J1_dffs[18] & !J1_dffs[13] & !J1_dffs[23] & !J1_dffs[15] & !J1_dffs[12] & !J1_dffs[16] & !J1_dffs[8];
C1_TL_value[7]_or_out = C1_TL_value[7]_p1_out # C1_TL_value[7]_p2_out # C1_TL_value[7]_p3_out # C1_TL_value[7]_p4_out;
C1_TL_value[7]_reg_input = C1_TL_value[7]_or_out;
C1_TL_value[7] = DFFE(C1_TL_value[7]_reg_input, GLOBAL(clock_24M), , , );


--B1_pwm_out is pwm_counter:inst|pwm_out at LC115
B1_pwm_out_p1_out = !B1_pwm_out & !A1L15;
B1_pwm_out_p2_out = !B1_pwm_out & A1L16;
B1_pwm_out_p3_out = A1L15 & !B1_delay_counter[5] & B1_delay_counter[4] & !B1_delay_counter[7] & !B1_delay_counter[6] & !B1_delay_counter[3];
B1_pwm_out_or_out = B1_pwm_out_p1_out # B1_pwm_out_p2_out # B1_pwm_out_p3_out;
B1_pwm_out_reg_input = !(B1_pwm_out_or_out);
B1_pwm_out = DFFE(B1_pwm_out_reg_input, GLOBAL(clock_24M), , reset, );


--C1_TH_value[7] is pwm_m:inst2|TH_value[7] at LC66
C1_TH_value[7]_p1_out = reset & !pwm_in & J2_dffs[7];
C1_TH_value[7]_p2_out = !reset & C1_TH_value[7];
C1_TH_value[7]_p3_out = pwm_in & C1_TH_value[7];
C1_TH_value[7]_p4_out = C1_TH_value[7] & !J2_dffs[0] & !J2_dffs[21] & !J2_dffs[19] & !J2_dffs[4] & !J2_dffs[3] & !J2_dffs[5] & !J2_dffs[11] & !J2_dffs[2] & !J2_dffs[20] & !J2_dffs[9] & !J2_dffs[22] & !J2_dffs[6] & !J2_dffs[17] & !J2_dffs[1] & !J2_dffs[14] & !J2_dffs[10] & !J2_dffs[18] & !J2_dffs[13] & !J2_dffs[23] & !J2_dffs[15] & !J2_dffs[12] & !J2_dffs[16] & !J2_dffs[8];
C1_TH_value[7]_or_out = C1_TH_value[7]_p1_out # C1_TH_value[7]_p2_out # C1_TH_value[7]_p3_out # C1_TH_value[7]_p4_out;
C1_TH_value[7]_reg_input = C1_TH_value[7]_or_out;
C1_TH_value[7] = DFFE(C1_TH_value[7]_reg_input, GLOBAL(clock_24M), , , );


--C1_TH_value[6] is pwm_m:inst2|TH_value[6] at LC65
C1_TH_value[6]_p1_out = reset & !pwm_in & J2_dffs[6];
C1_TH_value[6]_p2_out = !reset & C1_TH_value[6];
C1_TH_value[6]_p3_out = pwm_in & C1_TH_value[6];
C1_TH_value[6]_p4_out = C1_TH_value[6] & !J2_dffs[0] & !J2_dffs[21] & !J2_dffs[19] & !J2_dffs[4] & !J2_dffs[3] & !J2_dffs[5] & !J2_dffs[11] & !J2_dffs[2] & !J2_dffs[20] & !J2_dffs[9] & !J2_dffs[22] & !J2_dffs[7] & !J2_dffs[17] & !J2_dffs[1] & !J2_dffs[14] & !J2_dffs[10] & !J2_dffs[18] & !J2_dffs[13] & !J2_dffs[23] & !J2_dffs[15] & !J2_dffs[12] & !J2_dffs[16] & !J2_dffs[8];
C1_TH_value[6]_or_out = C1_TH_value[6]_p1_out # C1_TH_value[6]_p2_out # C1_TH_value[6]_p3_out # C1_TH_value[6]_p4_out;
C1_TH_value[6]_reg_input = C1_TH_value[6]_or_out;
C1_TH_value[6] = DFFE(C1_TH_value[6]_reg_input, GLOBAL(clock_24M), , , );


--C1_TH_value[5] is pwm_m:inst2|TH_value[5] at LC40
C1_TH_value[5]_p1_out = reset & !pwm_in & J2_dffs[5];
C1_TH_value[5]_p2_out = !reset & C1_TH_value[5];
C1_TH_value[5]_p3_out = pwm_in & C1_TH_value[5];
C1_TH_value[5]_p4_out = C1_TH_value[5] & !J2_dffs[0] & !J2_dffs[21] & !J2_dffs[19] & !J2_dffs[4] & !J2_dffs[3] & !J2_dffs[11] & !J2_dffs[2] & !J2_dffs[20] & !J2_dffs[9] & !J2_dffs[22] & !J2_dffs[7] & !J2_dffs[6] & !J2_dffs[17] & !J2_dffs[1] & !J2_dffs[14] & !J2_dffs[10] & !J2_dffs[18] & !J2_dffs[13] & !J2_dffs[23] & !J2_dffs[15] & !J2_dffs[12] & !J2_dffs[16] & !J2_dffs[8];
C1_TH_value[5]_or_out = C1_TH_value[5]_p1_out # C1_TH_value[5]_p2_out # C1_TH_value[5]_p3_out # C1_TH_value[5]_p4_out;
C1_TH_value[5]_reg_input = C1_TH_value[5]_or_out;
C1_TH_value[5] = DFFE(C1_TH_value[5]_reg_input, GLOBAL(clock_24M), , , );


--C1_TH_value[4] is pwm_m:inst2|TH_value[4] at LC37
C1_TH_value[4]_p1_out = reset & !pwm_in & J2_dffs[4];
C1_TH_value[4]_p2_out = !reset & C1_TH_value[4];
C1_TH_value[4]_p3_out = pwm_in & C1_TH_value[4];
C1_TH_value[4]_p4_out = C1_TH_value[4] & !J2_dffs[0] & !J2_dffs[21] & !J2_dffs[19] & !J2_dffs[3] & !J2_dffs[5] & !J2_dffs[11] & !J2_dffs[2] & !J2_dffs[20] & !J2_dffs[9] & !J2_dffs[22] & !J2_dffs[7] & !J2_dffs[6] & !J2_dffs[17] & !J2_dffs[1] & !J2_dffs[14] & !J2_dffs[10] & !J2_dffs[18] & !J2_dffs[13] & !J2_dffs[23] & !J2_dffs[15] & !J2_dffs[12] & !J2_dffs[16] & !J2_dffs[8];
C1_TH_value[4]_or_out = C1_TH_value[4]_p1_out # C1_TH_value[4]_p2_out # C1_TH_value[4]_p3_out # C1_TH_value[4]_p4_out;
C1_TH_value[4]_reg_input = C1_TH_value[4]_or_out;
C1_TH_value[4] = DFFE(C1_TH_value[4]_reg_input, GLOBAL(clock_24M), , , );


--C1_TH_value[3] is pwm_m:inst2|TH_value[3] at LC34
C1_TH_value[3]_p1_out = reset & !pwm_in & J2_dffs[3];
C1_TH_value[3]_p2_out = !reset & C1_TH_value[3];
C1_TH_value[3]_p3_out = pwm_in & C1_TH_value[3];
C1_TH_value[3]_p4_out = C1_TH_value[3] & !J2_dffs[0] & !J2_dffs[21] & !J2_dffs[19] & !J2_dffs[4] & !J2_dffs[5] & !J2_dffs[11] & !J2_dffs[2] & !J2_dffs[20] & !J2_dffs[9] & !J2_dffs[22] & !J2_dffs[7] & !J2_dffs[6] & !J2_dffs[17] & !J2_dffs[1] & !J2_dffs[14] & !J2_dffs[10] & !J2_dffs[18] & !J2_dffs[13] & !J2_dffs[23] & !J2_dffs[15] & !J2_dffs[12] & !J2_dffs[16] & !J2_dffs[8];
C1_TH_value[3]_or_out = C1_TH_value[3]_p1_out # C1_TH_value[3]_p2_out # C1_TH_value[3]_p3_out # C1_TH_value[3]_p4_out;
C1_TH_value[3]_reg_input = C1_TH_value[3]_or_out;
C1_TH_value[3] = DFFE(C1_TH_value[3]_reg_input, GLOBAL(clock_24M), , , );


--C1_TH_value[2] is pwm_m:inst2|TH_value[2] at LC33
C1_TH_value[2]_p1_out = reset & !pwm_in & J2_dffs[2];
C1_TH_value[2]_p2_out = !reset & C1_TH_value[2];
C1_TH_value[2]_p3_out = pwm_in & C1_TH_value[2];
C1_TH_value[2]_p4_out = C1_TH_value[2] & !J2_dffs[0] & !J2_dffs[21] & !J2_dffs[19] & !J2_dffs[4] & !J2_dffs[3] & !J2_dffs[5] & !J2_dffs[11] & !J2_dffs[20] & !J2_dffs[9] & !J2_dffs[22] & !J2_dffs[7] & !J2_dffs[6] & !J2_dffs[17] & !J2_dffs[1] & !J2_dffs[14] & !J2_dffs[10] & !J2_dffs[18] & !J2_dffs[13] & !J2_dffs[23] & !J2_dffs[15] & !J2_dffs[12] & !J2_dffs[16] & !J2_dffs[8];
C1_TH_value[2]_or_out = C1_TH_value[2]_p1_out # C1_TH_value[2]_p2_out # C1_TH_value[2]_p3_out # C1_TH_value[2]_p4_out;
C1_TH_value[2]_reg_input = C1_TH_value[2]_or_out;
C1_TH_value[2] = DFFE(C1_TH_value[2]_reg_input, GLOBAL(clock_24M), , , );


--C1_TH_value[1] is pwm_m:inst2|TH_value[1] at LC35
C1_TH_value[1]_p1_out = reset & !pwm_in & J2_dffs[1];
C1_TH_value[1]_p2_out = !reset & C1_TH_value[1];
C1_TH_value[1]_p3_out = pwm_in & C1_TH_value[1];
C1_TH_value[1]_p4_out = C1_TH_value[1] & !J2_dffs[0] & !J2_dffs[21] & !J2_dffs[19] & !J2_dffs[4] & !J2_dffs[3] & !J2_dffs[5] & !J2_dffs[11] & !J2_dffs[2] & !J2_dffs[20] & !J2_dffs[9] & !J2_dffs[22] & !J2_dffs[7] & !J2_dffs[6] & !J2_dffs[17] & !J2_dffs[14] & !J2_dffs[10] & !J2_dffs[18] & !J2_dffs[13] & !J2_dffs[23] & !J2_dffs[15] & !J2_dffs[12] & !J2_dffs[16] & !J2_dffs[8];
C1_TH_value[1]_or_out = C1_TH_value[1]_p1_out # C1_TH_value[1]_p2_out # C1_TH_value[1]_p3_out # C1_TH_value[1]_p4_out;
C1_TH_value[1]_reg_input = C1_TH_value[1]_or_out;
C1_TH_value[1] = DFFE(C1_TH_value[1]_reg_input, GLOBAL(clock_24M), , , );


--C1_TH_value[0] is pwm_m:inst2|TH_value[0] at LC36
C1_TH_value[0]_p1_out = reset & !pwm_in & J2_dffs[0];
C1_TH_value[0]_p2_out = !reset & C1_TH_value[0];
C1_TH_value[0]_p3_out = pwm_in & C1_TH_value[0];
C1_TH_value[0]_p4_out = C1_TH_value[0] & !J2_dffs[21] & !J2_dffs[19] & !J2_dffs[4] & !J2_dffs[3] & !J2_dffs[5] & !J2_dffs[11] & !J2_dffs[2] & !J2_dffs[20] & !J2_dffs[9] & !J2_dffs[22] & !J2_dffs[7] & !J2_dffs[6] & !J2_dffs[17] & !J2_dffs[1] & !J2_dffs[14] & !J2_dffs[10] & !J2_dffs[18] & !J2_dffs[13] & !J2_dffs[23] & !J2_dffs[15] & !J2_dffs[12] & !J2_dffs[16] & !J2_dffs[8];
C1_TH_value[0]_or_out = C1_TH_value[0]_p1_out # C1_TH_value[0]_p2_out # C1_TH_value[0]_p3_out # C1_TH_value[0]_p4_out;
C1_TH_value[0]_reg_input = C1_TH_value[0]_or_out;
C1_TH_value[0] = DFFE(C1_TH_value[0]_reg_input, GLOBAL(clock_24M), , , );


--C1L19 is pwm_m:inst2|TH_value~121 at LC41
C1L19_p1_out = !J2_dffs[0] & !J2_dffs[21] & !J2_dffs[19] & !J2_dffs[4] & !J2_dffs[3] & !J2_dffs[5] & !J2_dffs[11] & !J2_dffs[2] & !J2_dffs[20] & !J2_dffs[9] & !J2_dffs[22] & !J2_dffs[7] & !J2_dffs[6] & !J2_dffs[17] & !J2_dffs[1] & !J2_dffs[14] & !J2_dffs[10] & !J2_dffs[18] & !J2_dffs[13] & !J2_dffs[23] & !J2_dffs[15] & !J2_dffs[12] & !J2_dffs[16] & !J2_dffs[8];
C1L19_or_out = C1L19_p1_out # pwm_in;
C1L19 = C1L19_or_out;


--C1L29 is pwm_m:inst2|TL_value~125 at LC29
C1L29_p1_out = !J1_dffs[0] & !J1_dffs[21] & !J1_dffs[19] & !J1_dffs[4] & !J1_dffs[3] & !J1_dffs[5] & !J1_dffs[11] & !J1_dffs[2] & !J1_dffs[20] & !J1_dffs[9] & !J1_dffs[22] & !J1_dffs[7] & !J1_dffs[6] & !J1_dffs[17] & !J1_dffs[1] & !J1_dffs[14] & !J1_dffs[10] & !J1_dffs[18] & !J1_dffs[13] & !J1_dffs[23] & !J1_dffs[15] & !J1_dffs[12] & !J1_dffs[16] & !J1_dffs[8];
C1L29_or_out = C1L29_p1_out # !pwm_in;
C1L29 = C1L29_or_out;


--C1_data[7] is pwm_m:inst2|data[7] at LC113
C1_data[7]_p1_out = C1_TH_value[7] & C1L19 & !data_sel;
C1_data[7]_p2_out = !C1L19 & !data_sel & J2_dffs[7];
C1_data[7]_p3_out = data_sel & J1_dffs[7] & !C1L29;
C1_data[7]_p4_out = data_sel & C1L29 & C1_TL_value[7];
C1_data[7]_or_out = C1_data[7]_p1_out # C1_data[7]_p2_out # C1_data[7]_p3_out # C1_data[7]_p4_out;
C1_data[7]_reg_input = !(C1_data[7]_or_out);
C1_data[7] = DFFE(C1_data[7]_reg_input, GLOBAL(clock_24M), GLOBAL(reset), , );


--C1_data[6] is pwm_m:inst2|data[6] at LC110
C1_data[6]_p1_out = C1_TH_value[6] & C1L19 & !data_sel;
C1_data[6]_p2_out = !C1L19 & !data_sel & J2_dffs[6];
C1_data[6]_p3_out = data_sel & J1_dffs[6] & !C1L29;
C1_data[6]_p4_out = data_sel & C1L29 & C1_TL_value[6];
C1_data[6]_or_out = C1_data[6]_p1_out # C1_data[6]_p2_out # C1_data[6]_p3_out # C1_data[6]_p4_out;
C1_data[6]_reg_input = !(C1_data[6]_or_out);
C1_data[6] = DFFE(C1_data[6]_reg_input, GLOBAL(clock_24M), GLOBAL(reset), , );


--C1_data[5] is pwm_m:inst2|data[5] at LC109
C1_data[5]_p1_out = C1_TH_value[5] & C1L19 & !data_sel;
C1_data[5]_p2_out = !C1L19 & !data_sel & J2_dffs[5];
C1_data[5]_p3_out = data_sel & J1_dffs[5] & !C1L29;
C1_data[5]_p4_out = data_sel & C1L29 & C1_TL_value[5];
C1_data[5]_or_out = C1_data[5]_p1_out # C1_data[5]_p2_out # C1_data[5]_p3_out # C1_data[5]_p4_out;
C1_data[5]_reg_input = !(C1_data[5]_or_out);
C1_data[5] = DFFE(C1_data[5]_reg_input, GLOBAL(clock_24M), GLOBAL(reset), , );


--C1_data[4] is pwm_m:inst2|data[4] at LC107
C1_data[4]_p1_out = C1_TH_value[4] & C1L19 & !data_sel;
C1_data[4]_p2_out = !C1L19 & !data_sel & J2_dffs[4];
C1_data[4]_p3_out = data_sel & J1_dffs[4] & !C1L29;
C1_data[4]_p4_out = data_sel & C1L29 & C1_TL_value[4];
C1_data[4]_or_out = C1_data[4]_p1_out # C1_data[4]_p2_out # C1_data[4]_p3_out # C1_data[4]_p4_out;
C1_data[4]_reg_input = !(C1_data[4]_or_out);
C1_data[4] = DFFE(C1_data[4]_reg_input, GLOBAL(clock_24M), GLOBAL(reset), , );


--C1_data[3] is pwm_m:inst2|data[3] at LC105
C1_data[3]_p1_out = C1_TH_value[3] & C1L19 & !data_sel;
C1_data[3]_p2_out = !C1L19 & !data_sel & J2_dffs[3];
C1_data[3]_p3_out = data_sel & J1_dffs[3] & !C1L29;
C1_data[3]_p4_out = data_sel & C1L29 & C1_TL_value[3];
C1_data[3]_or_out = C1_data[3]_p1_out # C1_data[3]_p2_out # C1_data[3]_p3_out # C1_data[3]_p4_out;
C1_data[3]_reg_input = !(C1_data[3]_or_out);
C1_data[3] = DFFE(C1_data[3]_reg_input, GLOBAL(clock_24M), GLOBAL(reset), , );


--C1_data[2] is pwm_m:inst2|data[2] at LC104
C1_data[2]_p1_out = C1_TH_value[2] & C1L19 & !data_sel;
C1_data[2]_p2_out = !C1L19 & !data_sel & J2_dffs[2];
C1_data[2]_p3_out = data_sel & J1_dffs[2] & !C1L29;
C1_data[2]_p4_out = data_sel & C1L29 & C1_TL_value[2];
C1_data[2]_or_out = C1_data[2]_p1_out # C1_data[2]_p2_out # C1_data[2]_p3_out # C1_data[2]_p4_out;
C1_data[2]_reg_input = !(C1_data[2]_or_out);
C1_data[2] = DFFE(C1_data[2]_reg_input, GLOBAL(clock_24M), GLOBAL(reset), , );


--C1_data[1] is pwm_m:inst2|data[1] at LC102
C1_data[1]_p1_out = C1_TH_v