📄 buzzer.map.rpt
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+----------------------+----------------------+
; Logic cells ; 49 ;
; Total registers ; 17 ;
; I/O pins ; 7 ;
; Shareable expanders ; 22 ;
; Parallel expanders ; 8 ;
; Maximum fan-out node ; f_code[1] ;
; Maximum fan-out ; 40 ;
; Total fan-out ; 747 ;
; Average fan-out ; 9.58 ;
+----------------------+----------------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+-----------------------------------------+------------+------+-------------------------------------------------------------------------------------+
; Compilation Hierarchy Node ; Macrocells ; Pins ; Full Hierarchy Name ;
+-----------------------------------------+------------+------+-------------------------------------------------------------------------------------+
; |buzzer ; 49 ; 7 ; |buzzer ;
; |counter:inst| ; 49 ; 0 ; |buzzer|counter:inst ;
; |lpm_add_sub:add_rtl_1| ; 10 ; 0 ; |buzzer|counter:inst|lpm_add_sub:add_rtl_1 ;
; |addcore:adder[0]| ; 8 ; 0 ; |buzzer|counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[0] ;
; |a_csnbuffer:result_node| ; 8 ; 0 ; |buzzer|counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node ;
; |addcore:adder[1]| ; 2 ; 0 ; |buzzer|counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[1] ;
; |a_csnbuffer:result_node| ; 2 ; 0 ; |buzzer|counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node ;
; |lpm_counter:delay_counter_rtl_0| ; 18 ; 0 ; |buzzer|counter:inst|lpm_counter:delay_counter_rtl_0 ;
+-----------------------------------------+------------+------+-------------------------------------------------------------------------------------+
+-----------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: counter:inst|lpm_counter:delay_counter_rtl_0 ;
+------------------------+-------------------+--------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------+-------------------+--------------------------------------------------+
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; LPM_WIDTH ; 16 ; Untyped ;
; LPM_DIRECTION ; UP ; Untyped ;
; LPM_MODULUS ; 0 ; Untyped ;
; LPM_AVALUE ; UNUSED ; Untyped ;
; LPM_SVALUE ; UNUSED ; Untyped ;
; LPM_PORT_UPDOWN ; PORT_CONNECTIVITY ; Untyped ;
; DEVICE_FAMILY ; MAX3000A ; Untyped ;
; CARRY_CHAIN ; MANUAL ; Untyped ;
; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
; CARRY_CNT_EN ; SMART ; Untyped ;
; LABWIDE_SCLR ; ON ; Untyped ;
; USE_NEW_VERSION ; TRUE ; Untyped ;
; CBXI_PARAMETER ; NOTHING ; Untyped ;
+------------------------+-------------------+--------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: counter:inst|lpm_add_sub:add_rtl_1 ;
+------------------------+-------------+----------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------+-------------+----------------------------------------------+
; LPM_WIDTH ; 15 ; Untyped ;
; LPM_REPRESENTATION ; UNSIGNED ; Untyped ;
; LPM_DIRECTION ; ADD ; Untyped ;
; ONE_INPUT_IS_CONSTANT ; YES ; Untyped ;
; LPM_PIPELINE ; 0 ; Untyped ;
; MAXIMIZE_SPEED ; 5 ; Untyped ;
; REGISTERED_AT_END ; 0 ; Untyped ;
; OPTIMIZE_FOR_SPEED ; 9 ; Untyped ;
; USE_CS_BUFFERS ; 1 ; Untyped ;
; CARRY_CHAIN ; MANUAL ; Untyped ;
; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
; DEVICE_FAMILY ; MAX3000A ; Untyped ;
; USE_WYS ; OFF ; Untyped ;
; STYLE ; FAST ; Untyped ;
; CBXI_PARAMETER ; add_sub_pdh ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
+------------------------+-------------+----------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in H:/03-源码文件/VHDL/09-蜂鸣器/buzzer.map.eqn.
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 5.1 Build 176 10/26/2005 SJ Full Version
Info: Processing started: Mon Mar 26 09:16:13 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off buzzer -c buzzer
Info: Found 2 design units, including 1 entities, in source file counter.vhd
Info: Found design unit 1: counter-counter_architecture
Info: Found entity 1: counter
Info: Found 1 design units, including 1 entities, in source file buzzer.bdf
Info: Found entity 1: buzzer
Info: Elaborating entity "buzzer" for the top level hierarchy
Warning: Port "s_out" of type counter and instance "inst" is missing source signal
Info: Elaborating entity "counter" for hierarchy "counter:inst"
Info (10425): VHDL Case Statement information at counter.vhd(77): OTHERS choice is never selected
Info: Inferred 1 megafunctions from design logic
Info: Inferred lpm_counter megafunction (LPM_WIDTH=16) from the following logic: "counter:inst|delay_counter[0]~16"
Info: Found 1 design units, including 1 entities, in source file f:/altera/quartus51/libraries/megafunctions/lpm_counter.tdf
Info: Found entity 1: lpm_counter
Info: Found 1 design units, including 1 entities, in source file f:/altera/quartus51/libraries/megafunctions/lpm_add_sub.tdf
Info: Found entity 1: lpm_add_sub
Info: Found 1 design units, including 1 entities, in source file f:/altera/quartus51/libraries/megafunctions/addcore.tdf
Info: Found entity 1: addcore
Info: Found 1 design units, including 1 entities, in source file f:/altera/quartus51/libraries/megafunctions/a_csnbuffer.tdf
Info: Found entity 1: a_csnbuffer
Info: Found 1 design units, including 1 entities, in source file f:/altera/quartus51/libraries/megafunctions/look_add.tdf
Info: Found entity 1: look_add
Info: Found 1 design units, including 1 entities, in source file f:/altera/quartus51/libraries/megafunctions/altshift.tdf
Info: Found entity 1: altshift
Info: Registers with preset signals will power-up high
Info: Promoted pin-driven signal(s) to global signal
Info: Promoted clock signal driven by pin "clock_24M" to global clock signal
Info: Promoted clear signal driven by pin "reset" to global clear signal
Info: Implemented 78 device resources after synthesis - the final resource count might be different
Info: Implemented 6 input pins
Info: Implemented 1 output pins
Info: Implemented 49 macrocells
Info: Implemented 22 shareable expanders
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 1 warning
Info: Processing ended: Mon Mar 26 09:16:24 2007
Info: Elapsed time: 00:00:12
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