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VHDL基础的编程源代码

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--B1L1 is counter:inst|Equal~33
B1L1_p2_out = !f_code[0] & !f_code[1];
B1L1_p3_out = f_code[0] & f_code[1];
B1L1_or_out = B1L1_p2_out # B1L1_p3_out;
B1L1 = D1_dffs[0] $ B1L1_or_out;


--B1L2 is counter:inst|Equal~38
B1L2_p2_out = !f_code[1] & f_code[0] & f_code[2];
B1L2_p3_out = !f_code[0] & !f_code[2];
B1L2_p4_out = f_code[1] & !f_code[2];
B1L2_or_out = B1L2_p2_out # B1L2_p3_out # B1L2_p4_out;
B1L2 = D1_dffs[1] $ B1L2_or_out;


--B1L3 is counter:inst|Equal~44
B1L3_p0_out = f_code[1] & f_code[3] & !f_code[0];
B1L3_p2_out = f_code[2] & !f_code[1] & f_code[3] & f_code[0];
B1L3_p3_out = !f_code[1] & !f_code[3] & !f_code[0];
B1L3_p4_out = !f_code[2] & !f_code[3] & f_code[0];
B1L3_or_out = B1L15 # B1L3_p0_out # B1L3_p2_out # B1L3_p3_out # B1L3_p4_out;
B1L3 = D1_dffs[2] $ B1L3_or_out;


--B1L4 is counter:inst|Equal~51
B1L4_p0_out = f_code[2] & f_code[0] & f_code[1];
B1L4_p2_out = !f_code[3] & !f_code[2] & !f_code[0];
B1L4_p3_out = f_code[3] & f_code[2] & f_code[1];
B1L4_p4_out = f_code[3] & f_code[2] & f_code[0];
B1L4_or_out = B1L16 # B1L4_p0_out # B1L4_p2_out # B1L4_p3_out # B1L4_p4_out;
B1L4 = D1_dffs[3] $ B1L4_or_out;


--B1L5 is counter:inst|Equal~58
B1L5_p0_out = !f_code[2] & f_code[0] & f_code[3];
B1L5_p2_out = f_code[1] & f_code[2] & !f_code[0];
B1L5_p3_out = !f_code[0] & !f_code[3];
B1L5_p4_out = f_code[1] & f_code[2] & !f_code[3];
B1L5_or_out = B1L5_p0_out # B1L5_p2_out # B1L5_p3_out # B1L5_p4_out;
B1L5 = D1_dffs[4] $ B1L5_or_out;


--B1L6 is counter:inst|Equal~65
B1L6_p0_out = !f_code[1] & !f_code[0];
B1L6_p2_out = !f_code[2] & !f_code[3] & f_code[1] & f_code[0];
B1L6_p3_out = f_code[2] & f_code[3] & !f_code[0];
B1L6_p4_out = f_code[3] & !f_code[1];
B1L6_or_out = B1L6_p0_out # B1L6_p2_out # B1L6_p3_out # B1L6_p4_out;
B1L6 = D1_dffs[5] $ B1L6_or_out;


--B1L7 is counter:inst|Equal~72
B1L7_p2_out = f_code[0] & !f_code[3] & f_code[1];
B1L7_p3_out = f_code[0] & f_code[2];
B1L7_p4_out = !f_code[0] & !f_code[2];
B1L7_or_out = B1L7_p2_out # B1L7_p3_out # B1L7_p4_out;
B1L7 = D1_dffs[6] $ B1L7_or_out;


--B1L8 is counter:inst|Equal~78
B1L8_p0_out = f_code[1] & f_code[3] & !f_code[2];
B1L8_p2_out = f_code[0] & !f_code[1] & !f_code[3];
B1L8_p3_out = f_code[0] & f_code[1] & f_code[3];
B1L8_p4_out = !f_code[1] & !f_code[3] & !f_code[2];
B1L8_or_out = B1L17 # B1L8_p0_out # B1L8_p2_out # B1L8_p3_out # B1L8_p4_out;
B1L8 = D1_dffs[7] $ B1L8_or_out;


--B1L9 is counter:inst|Equal~85
B1L9_p0_out = !f_code[1] & !f_code[2] & f_code[3];
B1L9_p2_out = f_code[1] & f_code[2] & f_code[0];
B1L9_p3_out = f_code[2] & f_code[0] & !f_code[3];
B1L9_p4_out = f_code[1] & f_code[2] & !f_code[3];
B1L9_or_out = B1L9_p0_out # B1L9_p2_out # B1L9_p3_out # B1L9_p4_out;
B1L9 = D1_dffs[8] $ B1L9_or_out;


--B1L10 is counter:inst|Equal~92
B1L10_p0_out = f_code[0] & !f_code[2] & !f_code[3];
B1L10_p2_out = !f_code[0] & f_code[1] & f_code[2];
B1L10_p3_out = !f_code[0] & f_code[3];
B1L10_p4_out = f_code[1] & f_code[2] & f_code[3];
B1L10_or_out = B1L10_p0_out # B1L10_p2_out # B1L10_p3_out # B1L10_p4_out;
B1L10 = D1_dffs[9] $ B1L10_or_out;


--B1L11 is counter:inst|Equal~99
B1L11_p0_out = !f_code[1] & !f_code[3] & !f_code[2];
B1L11_p2_out = !f_code[0] & !f_code[1];
B1L11_p3_out = f_code[0] & f_code[1] & f_code[3];
B1L11_p4_out = f_code[0] & f_code[1] & f_code[2];
B1L11_or_out = B1L11_p0_out # B1L11_p2_out # B1L11_p3_out # B1L11_p4_out;
B1L11 = D1_dffs[10] $ B1L11_or_out;


--B1L12 is counter:inst|Equal~106
B1L12_p0_out = !f_code[2] & !f_code[1];
B1L12_p2_out = !f_code[3] & !f_code[2];
B1L12_p3_out = f_code[2] & f_code[0] & f_code[1];
B1L12_p4_out = !f_code[2] & !f_code[0];
B1L12_or_out = B1L12_p0_out # B1L12_p2_out # B1L12_p3_out # B1L12_p4_out;
B1L12 = D1_dffs[11] $ B1L12_or_out;


--B1L13 is counter:inst|Equal~113
B1L13_p0_out = !f_code[1] & f_code[3];
B1L13_p2_out = f_code[1] & f_code[2] & f_code[0] & !f_code[3];
B1L13_p3_out = !f_code[2] & f_code[3];
B1L13_p4_out = !f_code[0] & f_code[3];
B1L13_or_out = B1L13_p0_out # B1L13_p2_out # B1L13_p3_out # B1L13_p4_out;
B1L13 = D1_dffs[12] $ B1L13_or_out;


--B1L14 is counter:inst|Equal~120
B1L14_p2_out = !f_code[2] & !f_code[3];
B1L14_p3_out = !f_code[3] & !f_code[0];
B1L14_p4_out = !f_code[3] & !f_code[1];
B1L14_or_out = B1L14_p2_out # B1L14_p3_out # B1L14_p4_out;
B1L14 = D1_dffs[13] $ B1L14_or_out;


--D1_dffs[0] is counter:inst|lpm_counter:delay_counter_rtl_0|dffs[0]
D1_dffs[0]_p1_out = !D1_dffs[15] & !D1_dffs[14] & !B1L1 & !B1L2 & !B1L3 & !B1L4 & !B1L5 & B1L6 & !B1L7 & !B1L8 & !B1L9 & B1L10 & !B1L11 & !B1L12 & !B1L13 & !B1L14 & !D1_dffs[0];
D1_dffs[0]_or_out = D1_dffs[0]_p1_out;
D1_dffs[0]_reg_input = !D1_dffs[0]_or_out;
D1_dffs[0] = TFFE(D1_dffs[0]_reg_input, GLOBAL(clock_24M), GLOBAL(reset), , );


--H5L1 is counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[0]~0
H5L1_or_out = f_code[1];
H5L1 = f_code[0] $ H5L1_or_out;


--D1_dffs[1] is counter:inst|lpm_counter:delay_counter_rtl_0|dffs[1]
D1_dffs[1]_p1_out = !D1_dffs[15] & !D1_dffs[14] & !B1L1 & !B1L2 & !B1L3 & !B1L4 & !B1L5 & B1L6 & !B1L7 & !B1L8 & !B1L9 & B1L10 & !B1L11 & !B1L12 & !B1L13 & !B1L14;
D1_dffs[1]_p2_out = !D1_dffs[1] & !D1_dffs[0];
D1_dffs[1]_p3_out = D1_dffs[1] & D1_dffs[0];
D1_dffs[1]_or_out = D1_dffs[1]_p1_out # D1_dffs[1]_p2_out # D1_dffs[1]_p3_out;
D1_dffs[1]_reg_input = !(D1_dffs[1]_or_out);
D1_dffs[1] = DFFE(D1_dffs[1]_reg_input, GLOBAL(clock_24M), GLOBAL(reset), , );


--H5L2 is counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[1]~7
H5L2_p1_out = !f_code[1] & f_code[0] & f_code[2];
H5L2_p2_out = !f_code[0] & !f_code[2];
H5L2_p3_out = f_code[1] & !f_code[2];
H5L2_or_out = H5L2_p1_out # H5L2_p2_out # H5L2_p3_out;
H5L2 = H5L2_or_out;


--H2L1 is counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[0]~7
H2L1_p1_out = f_code[1] & f_code[2] & f_code[0];
H2L1_p2_out = f_code[2] & f_code[0] & !f_code[3];
H2L1_p3_out = f_code[1] & f_code[2] & !f_code[3];
H2L1_p4_out = !f_code[1] & !f_code[2] & f_code[3];
H2L1_or_out = H2L1_p1_out # H2L1_p2_out # H2L1_p3_out # H2L1_p4_out;
H2L1 = H2L1_or_out;


--D1_dffs[2] is counter:inst|lpm_counter:delay_counter_rtl_0|dffs[2]
D1_dffs[2]_p1_out = !D1_dffs[15] & !D1_dffs[14] & !B1L1 & !B1L2 & !B1L3 & !B1L4 & !B1L5 & B1L6 & !B1L7 & !B1L8 & !B1L9 & B1L10 & !B1L11 & !B1L12 & !B1L13 & !B1L14;
D1_dffs[2]_p2_out = !D1_dffs[0] & !D1_dffs[2];
D1_dffs[2]_p3_out = !D1_dffs[2] & !D1_dffs[1];
D1_dffs[2]_p4_out = D1_dffs[0] & D1_dffs[2] & D1_dffs[1];
D1_dffs[2]_or_out = D1_dffs[2]_p1_out # D1_dffs[2]_p2_out # D1_dffs[2]_p3_out # D1_dffs[2]_p4_out;
D1_dffs[2]_reg_input = !(D1_dffs[2]_or_out);
D1_dffs[2] = DFFE(D1_dffs[2]_reg_input, GLOBAL(clock_24M), GLOBAL(reset), , );


--H5L7 is counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[6]~11
H5L7_p1_out = f_code[0] & f_code[3] & !f_code[2];
H5L7_p2_out = !f_code[0] & f_code[2];
H5L7_p3_out = f_code[0] & !f_code[2] & !f_code[1];
H5L7_or_out = H5L7_p1_out # H5L7_p2_out # H5L7_p3_out;
H5L7 = H5L7_or_out;


--H2L13 is counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[1]|a_csnbuffer:result_node|sout_node[4]~26
H2L13_p1_out = f_code[1] & f_code[2] & f_code[0] & !f_code[3];
H2L13_p2_out = !f_code[2] & f_code[3];
H2L13_p3_out = !f_code[0] & f_code[3];
H2L13_p4_out = !f_code[1] & f_code[3];
H2L13_or_out = H2L13_p1_out # H2L13_p2_out # H2L13_p3_out # H2L13_p4_out;
H2L13 = H2L13_or_out;


--H5L8 is counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[7]~12
H5L8_p1_out = !f_code[3] & !f_code[0];
H5L8_p0_out = !f_code[0] & !f_code[1] & !f_code[2];
H5L8_p2_out = !f_code[3] & f_code[0] & f_code[1];
H5L8_p3_out = !f_code[0] & f_code[1] & f_code[2];
H5L8_p4_out = f_code[3] & f_code[0] & !f_code[1];
H5L8_or_out = H5L8_p0_out # H5L8_p2_out # H5L8_p3_out # H5L8_p4_out;
H5L8 = H5L8_p1_out $ H5L8_or_out;


--H5L3 is counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[2]~24
H5L3_p0_out = f_code[1] & f_code[3] & !f_code[0];
H5L3_p1_out = f_code[1] & !f_code[3] & f_code[0];
H5L3_p2_out = !f_code[1] & f_code[3] & f_code[0] & f_code[2];
H5L3_p3_out = !f_code[1] & !f_code[3] & !f_code[0];
H5L3_p4_out = !f_code[3] & f_code[0] & !f_code[2];
H5L3_or_out = H5L3_p0_out # H5L3_p1_out # H5L3_p2_out # H5L3_p3_out # H5L3_p4_out;
H5L3 = H5L3_or_out;


--H5L4 is counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[3]~30
H5L4_p0_out = f_code[2] & f_code[1] & f_code[0];
H5L4_p1_out = !f_code[2] & !f_code[1];
H5L4_p2_out = !f_code[2] & !f_code[3] & !f_code[0];
H5L4_p3_out = f_code[2] & f_code[1] & f_code[3];
H5L4_p4_out = f_code[2] & f_code[3] & f_code[0];
H5L4_or_out = H5L4_p0_out # H5L4_p1_out # H5L4_p2_out # H5L4_p3_out # H5L4_p4_out;
H5L4 = H5L4_or_out;


--D1_dffs[3] is counter:inst|lpm_counter:delay_counter_rtl_0|dffs[3]
D1_dffs[3]_p0_out = D1_dffs[2] & D1_dffs[3] & D1_dffs[0] & D1_dffs[1];
D1_dffs[3]_p1_out = !D1_dffs[15] & !D1_dffs[14] & !B1L1 & !B1L2 & !B1L3 & !B1L4 & !B1L5 & B1L6 & !B1L7 & !B1L8 & !B1L9 & B1L10 & !B1L11 & !B1L12 & !B1L13 & !B1L14;
D1_dffs[3]_p2_out = !D1_dffs[2] & !D1_dffs[3];
D1_dffs[3]_p3_out = !D1_dffs[3] & !D1_dffs[0];
D1_dffs[3]_p4_out = !D1_dffs[3] & !D1_dffs[1];
D1_dffs[3]_or_out = D1_dffs[3]_p0_out # D1_dffs[3]_p1_out # D1_dffs[3]_p2_out # D1_dffs[3]_p3_out # D1_dffs[3]_p4_out;
D1_dffs[3]_reg_input = !(D1_dffs[3]_or_out);
D1_dffs[3] = DFFE(D1_dffs[3]_reg_input, GLOBAL(clock_24M), GLOBAL(reset), , );


--H5L5 is counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[4]~35
H5L5_p1_out = f_code[1] & f_code[2] & !f_code[0];
H5L5_p2_out = !f_code[0] & !f_code[3];
H5L5_p3_out = f_code[1] & f_code[2] & !f_code[3];
H5L5_p4_out = !f_code[2] & f_code[0] & f_code[3];
H5L5_or_out = H5L5_p1_out # H5L5_p2_out # H5L5_p3_out # H5L5_p4_out;
H5L5 = H5L5_or_out;


--H5L6 is counter:inst|lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[5]~36
H5L6_p1_out = !f_code[1] & !f_code[2] & !f_code[0] & !f_code[3];
H5L6_p0_out = !f_code[1] & f_code[3];
H5L6_p2_out = !f_code[1] & f_code[2] & !f_code[0];
H5L6_p3_out = f_code[2] & !f_code[0] & f_code[3];
H5L6_p4_out = f_code[1] & !f_code[2] & f_code[0] & !f_code[3];
H5L6_or_out = H5L6_p0_out # H5L6_p2_out # H5L6_p3_out # H5L6_p4_out;
H5L6 = H5L6_p1_out $ H5L6_or_out;


--D1_dffs[4] is counter:inst|lpm_counter:delay_counter_rtl_0|dffs[4]
D1_dffs[4]_p1_out = !D1_dffs[15] & !D1_dffs[14] & !B1L1 & !B1L2 & !B1L3 & !B1L4 & !B1L5 & B1L6 & !B1L7 & !B1L8 & !B1L9 & B1L10 & !B1L11 & !B1L12 & !B1L13 & !B1L14;
D1_dffs[4]_p2_out = !D1_dffs[4] & D1L1;
D1_dffs[4]_p3_out = D1_dffs[4] & D1_dffs[3] & D1_dffs[2] & D1_dffs[0] & D1_dffs[1];
D1_dffs[4]_or_out = D1_dffs[4]_p1_out # D1_dffs[4]_p2_out # D1_dffs[4]_p3_out;
D1_dffs[4]_reg_input = !(D1_dffs[4]_or_out);
D1_dffs[4] = DFFE(D1_dffs[4]_reg_input, GLOBAL(clock_24M), GLOBAL(reset), , );


--D1_dffs[5] is counter:inst|lpm_counter:delay_counter_rtl_0|dffs[5]
D1_dffs[5]_p1_out = !D1_dffs[15] & !D1_dffs[14] & !B1L1 & !B1L2 & !B1L3 & !B1L4 & !B1L5 & B1L6 & !B1L7 & !B1L8 & !B1L9 & B1L10 & !B1L11 & !B1L12 & !B1L13 & !B1L14;
D1_dffs[5]_p2_out = !D1_dffs[5] & D1L2;
D1_dffs[5]_p3_out = D1_dffs[5] & D1_dffs[4] & D1_dffs[3] & D1_dffs[2] & D1_dffs[0] & D1_dffs[1];
D1_dffs[5]_or_out = D1_dffs[5]_p1_out # D1_dffs[5]_p2_out # D1_dffs[5]_p3_out;
D1_dffs[5]_reg_input = !(D1_dffs[5]_or_out);
D1_dffs[5] = DFFE(D1_dffs[5]_reg_input, GLOBAL(clock_24M), GLOBAL(reset), , );