crystal.map.eqn

VHDL基础的编程源代码

-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--B1_delay_counter[0] is counter:inst|delay_counter[0]
B1_delay_counter[0]_reg_input = VCC;
B1_delay_counter[0] = TFFE(B1_delay_counter[0]_reg_input, clock_24M, GLOBAL(reset), , );


--B2_delay_counter[0] is counter:inst1|delay_counter[0]
B2_delay_counter[0]_reg_input = VCC;
B2_delay_counter[0] = TFFE(B2_delay_counter[0]_reg_input, clock_40M, GLOBAL(reset), , );


--B1_delay_counter[1] is counter:inst|delay_counter[1]
B1_delay_counter[1]_or_out = B1_delay_counter[0];
B1_delay_counter[1]_reg_input = B1_delay_counter[1] $ B1_delay_counter[1]_or_out;
B1_delay_counter[1] = DFFE(B1_delay_counter[1]_reg_input, clock_24M, GLOBAL(reset), , );


--B2_delay_counter[1] is counter:inst1|delay_counter[1]
B2_delay_counter[1]_or_out = B2_delay_counter[0];
B2_delay_counter[1]_reg_input = B2_delay_counter[1] $ B2_delay_counter[1]_or_out;
B2_delay_counter[1] = DFFE(B2_delay_counter[1]_reg_input, clock_40M, GLOBAL(reset), , );


--B1_delay_counter[2] is counter:inst|delay_counter[2]
B1_delay_counter[2]_p1_out = B1_delay_counter[1] & B1_delay_counter[0];
B1_delay_counter[2]_or_out = B1_delay_counter[2];
B1_delay_counter[2]_reg_input = B1_delay_counter[2]_p1_out $ B1_delay_counter[2]_or_out;
B1_delay_counter[2] = DFFE(B1_delay_counter[2]_reg_input, clock_24M, GLOBAL(reset), , );


--B2_delay_counter[2] is counter:inst1|delay_counter[2]
B2_delay_counter[2]_p1_out = B2_delay_counter[1] & B2_delay_counter[0];
B2_delay_counter[2]_or_out = B2_delay_counter[2];
B2_delay_counter[2]_reg_input = B2_delay_counter[2]_p1_out $ B2_delay_counter[2]_or_out;
B2_delay_counter[2] = DFFE(B2_delay_counter[2]_reg_input, clock_40M, GLOBAL(reset), , );


--B1_delay_counter[3] is counter:inst|delay_counter[3]
B1_delay_counter[3]_p1_out = B1_delay_counter[2] & B1_delay_counter[1] & B1_delay_counter[0];
B1_delay_counter[3]_or_out = B1_delay_counter[3];
B1_delay_counter[3]_reg_input = B1_delay_counter[3]_p1_out $ B1_delay_counter[3]_or_out;
B1_delay_counter[3] = DFFE(B1_delay_counter[3]_reg_input, clock_24M, GLOBAL(reset), , );


--B2_delay_counter[3] is counter:inst1|delay_counter[3]
B2_delay_counter[3]_p1_out = B2_delay_counter[2] & B2_delay_counter[1] & B2_delay_counter[0];
B2_delay_counter[3]_or_out = B2_delay_counter[3];
B2_delay_counter[3]_reg_input = B2_delay_counter[3]_p1_out $ B2_delay_counter[3]_or_out;
B2_delay_counter[3] = DFFE(B2_delay_counter[3]_reg_input, clock_40M, GLOBAL(reset), , );


--B1_delay_counter[4] is counter:inst|delay_counter[4]
B1_delay_counter[4]_p1_out = B1_delay_counter[3] & B1_delay_counter[2] & B1_delay_counter[1] & B1_delay_counter[0];
B1_delay_counter[4]_or_out = B1_delay_counter[4];
B1_delay_counter[4]_reg_input = B1_delay_counter[4]_p1_out $ B1_delay_counter[4]_or_out;
B1_delay_counter[4] = DFFE(B1_delay_counter[4]_reg_input, clock_24M, GLOBAL(reset), , );


--B2_delay_counter[4] is counter:inst1|delay_counter[4]
B2_delay_counter[4]_p1_out = B2_delay_counter[3] & B2_delay_counter[2] & B2_delay_counter[1] & B2_delay_counter[0];
B2_delay_counter[4]_or_out = B2_delay_counter[4];
B2_delay_counter[4]_reg_input = B2_delay_counter[4]_p1_out $ B2_delay_counter[4]_or_out;
B2_delay_counter[4] = DFFE(B2_delay_counter[4]_reg_input, clock_40M, GLOBAL(reset), , );


--B1_delay_counter[5] is counter:inst|delay_counter[5]
B1_delay_counter[5]_p1_out = B1_delay_counter[4] & B1_delay_counter[3] & B1_delay_counter[2] & B1_delay_counter[1] & B1_delay_counter[0];
B1_delay_counter[5]_or_out = B1_delay_counter[5];
B1_delay_counter[5]_reg_input = B1_delay_counter[5]_p1_out $ B1_delay_counter[5]_or_out;
B1_delay_counter[5] = DFFE(B1_delay_counter[5]_reg_input, clock_24M, GLOBAL(reset), , );


--B2_delay_counter[5] is counter:inst1|delay_counter[5]
B2_delay_counter[5]_p1_out = B2_delay_counter[4] & B2_delay_counter[3] & B2_delay_counter[2] & B2_delay_counter[1] & B2_delay_counter[0];
B2_delay_counter[5]_or_out = B2_delay_counter[5];
B2_delay_counter[5]_reg_input = B2_delay_counter[5]_p1_out $ B2_delay_counter[5]_or_out;
B2_delay_counter[5] = DFFE(B2_delay_counter[5]_reg_input, clock_40M, GLOBAL(reset), , );


--B1_delay_counter[6] is counter:inst|delay_counter[6]
B1_delay_counter[6]_p1_out = B1_delay_counter[5] & B1_delay_counter[4] & B1_delay_counter[3] & B1_delay_counter[2] & B1_delay_counter[1] & B1_delay_counter[0];
B1_delay_counter[6]_or_out = B1_delay_counter[6];
B1_delay_counter[6]_reg_input = B1_delay_counter[6]_p1_out $ B1_delay_counter[6]_or_out;
B1_delay_counter[6] = DFFE(B1_delay_counter[6]_reg_input, clock_24M, GLOBAL(reset), , );


--B2_delay_counter[6] is counter:inst1|delay_counter[6]
B2_delay_counter[6]_p1_out = B2_delay_counter[5] & B2_delay_counter[4] & B2_delay_counter[3] & B2_delay_counter[2] & B2_delay_counter[1] & B2_delay_counter[0];
B2_delay_counter[6]_or_out = B2_delay_counter[6];
B2_delay_counter[6]_reg_input = B2_delay_counter[6]_p1_out $ B2_delay_counter[6]_or_out;
B2_delay_counter[6] = DFFE(B2_delay_counter[6]_reg_input, clock_40M, GLOBAL(reset), , );


--B1_delay_counter[7] is counter:inst|delay_counter[7]
B1_delay_counter[7]_p1_out = B1_delay_counter[6] & B1_delay_counter[5] & B1_delay_counter[4] & B1_delay_counter[3] & B1_delay_counter[2] & B1_delay_counter[1] & B1_delay_counter[0];
B1_delay_counter[7]_or_out = B1_delay_counter[7];
B1_delay_counter[7]_reg_input = B1_delay_counter[7]_p1_out $ B1_delay_counter[7]_or_out;
B1_delay_counter[7] = DFFE(B1_delay_counter[7]_reg_input, clock_24M, GLOBAL(reset), , );


--B2_delay_counter[7] is counter:inst1|delay_counter[7]
B2_delay_counter[7]_p1_out = B2_delay_counter[6] & B2_delay_counter[5] & B2_delay_counter[4] & B2_delay_counter[3] & B2_delay_counter[2] & B2_delay_counter[1] & B2_delay_counter[0];
B2_delay_counter[7]_or_out = B2_delay_counter[7];
B2_delay_counter[7]_reg_input = B2_delay_counter[7]_p1_out $ B2_delay_counter[7]_or_out;
B2_delay_counter[7] = DFFE(B2_delay_counter[7]_reg_input, clock_40M, GLOBAL(reset), , );


--B1_delay_counter[8] is counter:inst|delay_counter[8]
B1_delay_counter[8]_p0_out = B1_delay_counter[2] & B1_delay_counter[8] & B1_delay_counter[1] & B1_delay_counter[0] & B1_delay_counter[7] & B1_delay_counter[6] & B1_delay_counter[5] & B1_delay_counter[4] & B1_delay_counter[3];
B1_delay_counter[8]_p1_out = !B1_delay_counter[2] & !B1_delay_counter[8];
B1_delay_counter[8]_p2_out = !B1_delay_counter[8] & !B1_delay_counter[1];
B1_delay_counter[8]_p4_out = !B1_delay_counter[8] & !B1_delay_counter[0];
B1_delay_counter[8]_or_out = B1L29 # B1_delay_counter[8]_p0_out # B1_delay_counter[8]_p1_out # B1_delay_counter[8]_p2_out # B1_delay_counter[8]_p4_out;
B1_delay_counter[8]_reg_input = !(B1_delay_counter[8]_or_out);
B1_delay_counter[8] = DFFE(B1_delay_counter[8]_reg_input, clock_24M, GLOBAL(reset), , );


--B2_delay_counter[8] is counter:inst1|delay_counter[8]
B2_delay_counter[8]_p0_out = B2_delay_counter[2] & B2_delay_counter[8] & B2_delay_counter[1] & B2_delay_counter[0] & B2_delay_counter[7] & B2_delay_counter[6] & B2_delay_counter[5] & B2_delay_counter[4] & B2_delay_counter[3];
B2_delay_counter[8]_p1_out = !B2_delay_counter[2] & !B2_delay_counter[8];
B2_delay_counter[8]_p2_out = !B2_delay_counter[8] & !B2_delay_counter[1];
B2_delay_counter[8]_p4_out = !B2_delay_counter[8] & !B2_delay_counter[0];
B2_delay_counter[8]_or_out = B2L30 # B2_delay_counter[8]_p0_out # B2_delay_counter[8]_p1_out # B2_delay_counter[8]_p2_out # B2_delay_counter[8]_p4_out;
B2_delay_counter[8]_reg_input = !(B2_delay_counter[8]_or_out);
B2_delay_counter[8] = DFFE(B2_delay_counter[8]_reg_input, clock_40M, GLOBAL(reset), , );


--B1_delay_counter[9] is counter:inst|delay_counter[9]
B1_delay_counter[9]_p1_out = !B1_delay_counter[24] & B1_delay_counter[23] & !B1_delay_counter[22] & !B1_delay_counter[19] & B1_delay_counter[18] & !B1_delay_counter[15] & !B1_delay_counter[14] & !B1_delay_counter[13] & B1_delay_counter[12] & B1_delay_counter[11] & !B1_delay_counter[10] & B1_delay_counter[21] & B1_delay_counter[20] & B1_delay_counter[17] & B1_delay_counter[16] & B1_delay_counter[7] & B1_delay_counter[6] & B1_delay_counter[5] & B1_delay_counter[4] & B1_delay_counter[3] & B1_delay_counter[2] & B1_delay_counter[1] & B1_delay_counter[0] & B1_delay_counter[9];
B1_delay_counter[9]_p2_out = B1_delay_counter[7] & B1_delay_counter[6] & B1_delay_counter[5] & B1_delay_counter[4] & B1_delay_counter[3] & B1_delay_counter[2] & B1_delay_counter[1] & B1_delay_counter[0] & B1_delay_counter[8];
B1_delay_counter[9]_or_out = B1_delay_counter[9]_p1_out # B1_delay_counter[9]_p2_out;
B1_delay_counter[9]_reg_input = B1_delay_counter[9]_or_out;
B1_delay_counter[9] = TFFE(B1_delay_counter[9]_reg_input, clock_24M, GLOBAL(reset), , );


--B2_delay_counter[9] is counter:inst1|delay_counter[9]
B2_delay_counter[9]_p1_out = B2_delay_counter[8] & B2_delay_counter[7] & B2_delay_counter[6] & B2_delay_counter[5] & B2_delay_counter[4] & B2_delay_counter[3] & B2_delay_counter[2] & B2_delay_counter[1] & B2_delay_counter[0];
B2_delay_counter[9]_or_out = B2_delay_counter[9];
B2_delay_counter[9]_reg_input = B2_delay_counter[9]_p1_out $ B2_delay_counter[9]_or_out;
B2_delay_counter[9] = DFFE(B2_delay_counter[9]_reg_input, clock_40M, GLOBAL(reset), , );