mips.qsf

用VHDL设计具有简单MIPS功能的源码

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		MIPS_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C35F672C6
set_global_assignment -name TOP_LEVEL_ENTITY MIPS
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:48:06  JUNE 30, 2006"
set_global_assignment -name LAST_QUARTUS_VERSION 5.1
set_global_assignment -name VERILOG_FILE alu.v
set_global_assignment -name VERILOG_FILE define.v
set_global_assignment -name VERILOG_FILE IF.v
set_global_assignment -name VERILOG_FILE dffre.v
set_global_assignment -name VERILOG_FILE mips.v
set_global_assignment -name VERILOG_FILE id.v
set_global_assignment -name VERILOG_FILE regfile.v
set_global_assignment -name VERILOG_FILE exe.v
set_global_assignment -name VERILOG_FILE mem.v
set_global_assignment -name VERILOG_FILE mipstest.v
set_global_assignment -name VERILOG_FILE testif.v
set_global_assignment -name VERILOG_FILE instrmem.v
set_global_assignment -name VERILOG_FILE testid.v
set_global_assignment -name VERILOG_FILE datamem.v
set_global_assignment -name VERILOG_FILE testmem.v
set_global_assignment -name VECTOR_WAVEFORM_FILE MIPS.vwf