decoder_3_8.fnsim.qmsg

利用CASE语句的3-8译码器,3个为数据输入,3个为控制端,分别为S1,S2,S3,输出数据为八位

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Functional Simulation Netlist Generation Quartus II " "Info: Running Quartus II Functional Simulation Netlist Generation" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version " "Info: Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Dec 06 21:17:04 2008 " "Info: Processing started: Sat Dec 06 21:17:04 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off decoder_3_8 -c decoder_3_8 --generate_functional_sim_netlist " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off decoder_3_8 -c decoder_3_8 --generate_functional_sim_netlist" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "decoder_3_8.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file decoder_3_8.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 decoder_3_8-ONE " "Info: Found design unit 1: decoder_3_8-ONE" {  } { { "decoder_3_8.vhd" "" { Text "D:/altera/quartus60/实例/3-8译码器/decoder_3_8.vhd" 8 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 decoder_3_8 " "Info: Found entity 1: decoder_3_8" {  } { { "decoder_3_8.vhd" "" { Text "D:/altera/quartus60/实例/3-8译码器/decoder_3_8.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "decoder_3_8 " "Info: Elaborating entity \"decoder_3_8\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../libraries/megafunctions/lpm_mux.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../libraries/megafunctions/lpm_mux.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_mux " "Info: Found entity 1: lpm_mux" {  } { { "lpm_mux.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/lpm_mux.tdf" 72 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux0 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux0\"" {  } { { "decoder_3_8.vhd" "" { Text "D:/altera/quartus60/实例/3-8译码器/decoder_3_8.vhd" 15 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_u6c.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_u6c.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_u6c " "Info: Found entity 1: mux_u6c" {  } { { "db/mux_u6c.tdf" "" { Text "D:/altera/quartus60/实例/3-8译码器/db/mux_u6c.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux1 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux1\"" {  } { { "decoder_3_8.vhd" "" { Text "D:/altera/quartus60/实例/3-8译码器/decoder_3_8.vhd" 15 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux2 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux2\"" {  } { { "decoder_3_8.vhd" "" { Text "D:/altera/quartus60/实例/3-8译码器/decoder_3_8.vhd" 15 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux3 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux3\"" {  } { { "decoder_3_8.vhd" "" { Text "D:/altera/quartus60/实例/3-8译码器/decoder_3_8.vhd" 15 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux4 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux4\"" {  } { { "decoder_3_8.vhd" "" { Text "D:/altera/quartus60/实例/3-8译码器/decoder_3_8.vhd" 15 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux5 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux5\"" {  } { { "decoder_3_8.vhd" "" { Text "D:/altera/quartus60/实例/3-8译码器/decoder_3_8.vhd" 15 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux6 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux6\"" {  } { { "decoder_3_8.vhd" "" { Text "D:/altera/quartus60/实例/3-8译码器/decoder_3_8.vhd" 15 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux7 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux7\"" {  } { { "decoder_3_8.vhd" "" { Text "D:/altera/quartus60/实例/3-8译码器/decoder_3_8.vhd" 15 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Functional Simulation Netlist Generation 0 s 0 s Quartus II " "Info: Quartus II Functional Simulation Netlist Generation was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Dec 06 21:17:07 2008 " "Info: Processing ended: Sat Dec 06 21:17:07 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}