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📄 aduc702x.cfg

📁 openocd是比较好的调试工具软件,支持wiggle调试arm,也支持其他调试接口,例如USB口的FT2232.
💻 CFG
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## -*- tcl -*-##jtag_nsrst_delay 200jtag_ntrst_delay 200# This is for the case that TRST/SRST is not wired on your JTAG adaptor.# Don't really need them anyways.  reset_config none## JTAG scan chain#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)jtag_device 4 0x1 0xf 0xe#### Target configuration##target create target0 arm7tdmi -endian little -chain-position 0## software initiated reset (if your SRST isn't wired)#proc target_0_reset {} { mwb 0x0ffff0230 04 }# use top 1k of SRAM for as temporary JTAG memory #[new_target_name] configure -work-area-virt 0 -work-area-phys 0x11C00 -work-area-size 0x400 -work-area-backup 1## flash configurationflash bank aduc702x 0x80000 0x10000 2 2 0## If you use the watchdog, the following code makes sure that the board## doesn't reboot when halted via JTAG.  Yes, on the older generation## AdUC702x, timer3 continues running even when the CPU is halted.proc watchdog_service {} {    global watchdog_hdl    mww 0xffff036c 0#    puts "watchdog!!"    set watchdog_hdl [after 500 watchdog_service]}[new_target_name] configure -event reset-halt-post {  watchdog_service }[new_target_name] configure -event old-pre_resume { global watchdog_hdl; after cancel $watchdog_hdl }

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