📄 keylock.tan.qmsg
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{ "Info" "ITDB_FULL_NEGATIVE_HOLD_RESULT" "counter:U1\|lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[21\] KEYBOARD:U2\|N\[3\] CLK_40M 4.0 ns " "Info: Found hold time violation between source pin or register \"counter:U1\|lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[21\]\" and destination pin or register \"KEYBOARD:U2\|N\[3\]\" for clock \"CLK_40M\" (Hold time is 4.0 ns)" { { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "4.300 ns + Largest " "Info: + Largest clock skew is 4.300 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK_40M destination 6.700 ns + Longest register " "Info: + Longest clock path from clock \"CLK_40M\" to destination register is 6.700 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK_40M 1 CLK PIN_55 23 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_55; Fanout = 23; CLK Node = 'CLK_40M'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "" { CLK_40M } "NODE_NAME" } "" } } { "KEYLOCK.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/KEYLOCK.VHD" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns counter:U1\|lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[15\] 2 REG LC1_A24 50 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC1_A24; Fanout = 50; REG Node = 'counter:U1\|lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[15\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "0.900 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.800 ns) + CELL(0.000 ns) 6.700 ns KEYBOARD:U2\|N\[3\] 3 REG LC8_A24 2 " "Info: 3: + IC(3.800 ns) + CELL(0.000 ns) = 6.700 ns; Loc. = LC8_A24; Fanout = 2; REG Node = 'KEYBOARD:U2\|N\[3\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "3.800 ns" { counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] KEYBOARD:U2|N[3] } "NODE_NAME" } "" } } { "KEYBOARD.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/KEYBOARD.VHD" 65 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.500 ns ( 37.31 % ) " "Info: Total cell delay = 2.500 ns ( 37.31 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.200 ns ( 62.69 % ) " "Info: Total interconnect delay = 4.200 ns ( 62.69 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "6.700 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] KEYBOARD:U2|N[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "6.700 ns" { CLK_40M CLK_40M~out counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] KEYBOARD:U2|N[3] } { 0.000ns 0.000ns 0.400ns 3.800ns } { 0.000ns 2.000ns 0.500ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK_40M source 2.400 ns - Shortest register " "Info: - Shortest clock path from clock \"CLK_40M\" to source register is 2.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK_40M 1 CLK PIN_55 23 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_55; Fanout = 23; CLK Node = 'CLK_40M'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "" { CLK_40M } "NODE_NAME" } "" } } { "KEYLOCK.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/KEYLOCK.VHD" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.000 ns) 2.400 ns counter:U1\|lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[21\] 2 REG LC7_A24 6 " "Info: 2: + IC(0.400 ns) + CELL(0.000 ns) = 2.400 ns; Loc. = LC7_A24; Fanout = 6; REG Node = 'counter:U1\|lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[21\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "0.400 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.000 ns ( 83.33 % ) " "Info: Total cell delay = 2.000 ns ( 83.33 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.400 ns ( 16.67 % ) " "Info: Total interconnect delay = 0.400 ns ( 16.67 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "2.400 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.400 ns" { CLK_40M CLK_40M~out counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "6.700 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] KEYBOARD:U2|N[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "6.700 ns" { CLK_40M CLK_40M~out counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] KEYBOARD:U2|N[3] } { 0.000ns 0.000ns 0.400ns 3.800ns } { 0.000ns 2.000ns 0.500ns 0.000ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "2.400 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.400 ns" { CLK_40M CLK_40M~out counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns - " "Info: - Micro clock to output delay of source is 0.500 ns" { } { { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.100 ns - Shortest register register " "Info: - Shortest register to register delay is 1.100 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns counter:U1\|lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[21\] 1 REG LC7_A24 6 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC7_A24; Fanout = 6; REG Node = 'counter:U1\|lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[21\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "" { counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(0.800 ns) 1.100 ns KEYBOARD:U2\|N\[3\] 2 REG LC8_A24 2 " "Info: 2: + IC(0.300 ns) + CELL(0.800 ns) = 1.100 ns; Loc. = LC8_A24; Fanout = 2; REG Node = 'KEYBOARD:U2\|N\[3\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "1.100 ns" { counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] KEYBOARD:U2|N[3] } "NODE_NAME" } "" } } { "KEYBOARD.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/KEYBOARD.VHD" 65 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.800 ns ( 72.73 % ) " "Info: Total cell delay = 0.800 ns ( 72.73 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.300 ns ( 27.27 % ) " "Info: Total interconnect delay = 0.300 ns ( 27.27 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "1.100 ns" { counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] KEYBOARD:U2|N[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "1.100 ns" { counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] KEYBOARD:U2|N[3] } { 0.000ns 0.300ns } { 0.000ns 0.800ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TH_DELAY" "1.300 ns + " "Info: + Micro hold delay of destination is 1.300 ns" { } { { "KEYBOARD.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/KEYBOARD.VHD" 65 -1 0 } } } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "6.700 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] KEYBOARD:U2|N[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "6.700 ns" { CLK_40M CLK_40M~out counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] KEYBOARD:U2|N[3] } { 0.000ns 0.000ns 0.400ns 3.800ns } { 0.000ns 2.000ns 0.500ns 0.000ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "2.400 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.400 ns" { CLK_40M CLK_40M~out counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "1.100 ns" { counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] KEYBOARD:U2|N[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "1.100 ns" { counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[21] KEYBOARD:U2|N[3] } { 0.000ns 0.300ns } { 0.000ns 0.800ns } } } } 0 0 "Found hold time violation between source pin or register \"%1!s!\" and destination pin or register \"%2!s!\" for clock \"%3!s!\" (Hold time is %4!s!)" 0 0}
{ "Info" "ITDB_TSU_RESULT" "CONTROLER:U3\|QA KEY_UNL CLK_40M 4.500 ns register " "Info: tsu for register \"CONTROLER:U3\|QA\" (data pin = \"KEY_UNL\", clock pin = \"CLK_40M\") is 4.500 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "10.600 ns + Longest pin register " "Info: + Longest pin to register delay is 10.600 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.900 ns) 4.900 ns KEY_UNL 1 PIN PIN_9 2 " "Info: 1: + IC(0.000 ns) + CELL(4.900 ns) = 4.900 ns; Loc. = PIN_9; Fanout = 2; PIN Node = 'KEY_UNL'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "" { KEY_UNL } "NODE_NAME" } "" } } { "KEYLOCK.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/KEYLOCK.VHD" 14 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.000 ns) + CELL(1.400 ns) 9.300 ns CONTROLER:U3\|QA~281 2 COMB LC6_A36 2 " "Info: 2: + IC(3.000 ns) + CELL(1.400 ns) = 9.300 ns; Loc. = LC6_A36; Fanout = 2; COMB Node = 'CONTROLER:U3\|QA~281'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "4.400 ns" { KEY_UNL CONTROLER:U3|QA~281 } "NODE_NAME" } "" } } { "CONTROLER.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/CONTROLER.VHD" 20 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.000 ns) 10.600 ns CONTROLER:U3\|QA 3 REG LC2_A36 2 " "Info: 3: + IC(0.300 ns) + CELL(1.000 ns) = 10.600 ns; Loc. = LC2_A36; Fanout = 2; REG Node = 'CONTROLER:U3\|QA'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "1.300 ns" { CONTROLER:U3|QA~281 CONTROLER:U3|QA } "NODE_NAME" } "" } } { "CONTROLER.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/CONTROLER.VHD" 20 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "7.300 ns ( 68.87 % ) " "Info: Total cell delay = 7.300 ns ( 68.87 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.300 ns ( 31.13 % ) " "Info: Total interconnect delay = 3.300 ns ( 31.13 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "10.600 ns" { KEY_UNL CONTROLER:U3|QA~281 CONTROLER:U3|QA } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "10.600 ns" { KEY_UNL KEY_UNL~out CONTROLER:U3|QA~281 CONTROLER:U3|QA } { 0.000ns 0.000ns 3.000ns 0.300ns } { 0.000ns 4.900ns 1.400ns 1.000ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" { } { { "CONTROLER.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/CONTROLER.VHD" 20 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK_40M destination 6.700 ns - Shortest register " "Info: - Shortest clock path from clock \"CLK_40M\" to destination register is 6.700 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK_40M 1 CLK PIN_55 23 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_55; Fanout = 23; CLK Node = 'CLK_40M'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "" { CLK_40M } "NODE_NAME" } "" } } { "KEYLOCK.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/KEYLOCK.VHD" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns counter:U1\|lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[15\] 2 REG LC1_A24 50 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC1_A24; Fanout = 50; REG Node = 'counter:U1\|lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[15\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "0.900 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.800 ns) + CELL(0.000 ns) 6.700 ns CONTROLER:U3\|QA 3 REG LC2_A36 2 " "Info: 3: + IC(3.800 ns) + CELL(0.000 ns) = 6.700 ns; Loc. = LC2_A36; Fanout = 2; REG Node = 'CONTROLER:U3\|QA'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "3.800 ns" { counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] CONTROLER:U3|QA } "NODE_NAME" } "" } } { "CONTROLER.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/CONTROLER.VHD" 20 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.500 ns ( 37.31 % ) " "Info: Total cell delay = 2.500 ns ( 37.31 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.200 ns ( 62.69 % ) " "Info: Total interconnect delay = 4.200 ns ( 62.69 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "6.700 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] CONTROLER:U3|QA } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "6.700 ns" { CLK_40M CLK_40M~out counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] CONTROLER:U3|QA } { 0.000ns 0.000ns 0.400ns 3.800ns } { 0.000ns 2.000ns 0.500ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "10.600 ns" { KEY_UNL CONTROLER:U3|QA~281 CONTROLER:U3|QA } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "10.600 ns" { KEY_UNL KEY_UNL~out CONTROLER:U3|QA~281 CONTROLER:U3|QA } { 0.000ns 0.000ns 3.000ns 0.300ns } { 0.000ns 4.900ns 1.400ns 1.000ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "6.700 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] CONTROLER:U3|QA } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "6.700 ns" { CLK_40M CLK_40M~out counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] CONTROLER:U3|QA } { 0.000ns 0.000ns 0.400ns 3.800ns } { 0.000ns 2.000ns 0.500ns 0.000ns } } } } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "CLK_40M SEGOUT\[6\] CONTROLER:U3\|ACC\[14\] 30.300 ns register " "Info: tco from clock \"CLK_40M\" to destination pin \"SEGOUT\[6\]\" through register \"CONTROLER:U3\|ACC\[14\]\" is 30.300 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK_40M source 11.600 ns + Longest register " "Info: + Longest clock path from clock \"CLK_40M\" to source register is 11.600 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK_40M 1 CLK PIN_55 23 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_55; Fanout = 23; CLK Node = 'CLK_40M'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "" { CLK_40M } "NODE_NAME" } "" } } { "KEYLOCK.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/KEYLOCK.VHD" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns counter:U1\|lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[15\] 2 REG LC1_A24 50 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC1_A24; Fanout = 50; REG Node = 'counter:U1\|lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[15\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "0.900 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.800 ns) + CELL(0.500 ns) 7.200 ns KEYBOARD:U2\|N\[3\] 3 REG LC8_A24 2 " "Info: 3: + IC(3.800 ns) + CELL(0.500 ns) = 7.200 ns; Loc. = LC8_A24; Fanout = 2; REG Node = 'KEYBOARD:U2\|N\[3\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "4.300 ns" { counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] KEYBOARD:U2|N[3] } "NODE_NAME" } "" } } { "KEYBOARD.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/KEYBOARD.VHD" 65 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(1.700 ns) 10.300 ns KEYBOARD:U2\|FN~27 4 COMB LC2_A32 19 " "Info: 4: + IC(1.400 ns) + CELL(1.700 ns) = 10.300 ns; Loc. = LC2_A32; Fanout = 19; COMB Node = 'KEYBOARD:U2\|FN~27'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "3.100 ns" { KEYBOARD:U2|N[3] KEYBOARD:U2|FN~27 } "NODE_NAME" } "" } } { "KEYBOARD.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/KEYBOARD.VHD" 13 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.300 ns) + CELL(0.000 ns) 11.600 ns CONTROLER:U3\|ACC\[14\] 5 REG LC6_A29 5 " "Info: 5: + IC(1.300 ns) + CELL(0.000 ns) = 11.600 ns; Loc. = LC6_A29; Fanout = 5; REG Node = 'CONTROLER:U3\|ACC\[14\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "1.300 ns" { KEYBOARD:U2|FN~27 CONTROLER:U3|ACC[14] } "NODE_NAME" } "" } } { "CONTROLER.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/CONTROLER.VHD" 35 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.700 ns ( 40.52 % ) " "Info: Total cell delay = 4.700 ns ( 40.52 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.900 ns ( 59.48 % ) " "Info: Total interconnect delay = 6.900 ns ( 59.48 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "11.600 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] KEYBOARD:U2|N[3] KEYBOARD:U2|FN~27 CONTROLER:U3|ACC[14] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "11.600 ns" { CLK_40M CLK_40M~out counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] KEYBOARD:U2|N[3] KEYBOARD:U2|FN~27 CONTROLER:U3|ACC[14] } { 0.000ns 0.000ns 0.400ns 3.800ns 1.400ns 1.300ns } { 0.000ns 2.000ns 0.500ns 0.500ns 1.700ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns + " "Info: + Micro clock to output delay of source is 0.500 ns" { } { { "CONTROLER.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/CONTROLER.VHD" 35 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "18.200 ns + Longest register pin " "Info: + Longest register to pin delay is 18.200 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns CONTROLER:U3\|ACC\[14\] 1 REG LC6_A29 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC6_A29; Fanout = 5; REG Node = 'CONTROLER:U3\|ACC\[14\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "" { CONTROLER:U3|ACC[14] } "NODE_NAME" } "" } } { "CONTROLER.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/CONTROLER.VHD" 35 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(1.700 ns) 3.700 ns CONTROLER:U3\|DB\[2\]~34 2 COMB LC5_A17 1 " "Info: 2: + IC(2.000 ns) + CELL(1.700 ns) = 3.700 ns; Loc. = LC5_A17; Fanout = 1; COMB Node = 'CONTROLER:U3\|DB\[2\]~34'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "3.700 ns" { CONTROLER:U3|ACC[14] CONTROLER:U3|DB[2]~34 } "NODE_NAME" } "" } } { "CONTROLER.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/CONTROLER.VHD" 15 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.900 ns) + CELL(1.600 ns) 7.200 ns CONTROLER:U3\|DB\[2\]~35 3 COMB LC8_A30 7 " "Info: 3: + IC(1.900 ns) + CELL(1.600 ns) = 7.200 ns; Loc. = LC8_A30; Fanout = 7; COMB Node = 'CONTROLER:U3\|DB\[2\]~35'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "3.500 ns" { CONTROLER:U3|DB[2]~34 CONTROLER:U3|DB[2]~35 } "NODE_NAME" } "" } } { "CONTROLER.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/CONTROLER.VHD" 15 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.200 ns) + CELL(1.600 ns) 11.000 ns DISPLAY:U4\|SEGOUT\[6\]~129 4 COMB LC1_E33 1 " "Info: 4: + IC(2.200 ns) + CELL(1.600 ns) = 11.000 ns; Loc. = LC1_E33; Fanout = 1; COMB Node = 'DISPLAY:U4\|SEGOUT\[6\]~129'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "3.800 ns" { CONTROLER:U3|DB[2]~35 DISPLAY:U4|SEGOUT[6]~129 } "NODE_NAME" } "" } } { "DISPLAY.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/DISPLAY.VHD" 9 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.900 ns) + CELL(6.300 ns) 18.200 ns SEGOUT\[6\] 5 PIN PIN_141 0 " "Info: 5: + IC(0.900 ns) + CELL(6.300 ns) = 18.200 ns; Loc. = PIN_141; Fanout = 0; PIN Node = 'SEGOUT\[6\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "7.200 ns" { DISPLAY:U4|SEGOUT[6]~129 SEGOUT[6] } "NODE_NAME" } "" } } { "KEYLOCK.VHD" "" { Text "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/KEYLOCK.VHD" 18 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "11.200 ns ( 61.54 % ) " "Info: Total cell delay = 11.200 ns ( 61.54 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.000 ns ( 38.46 % ) " "Info: Total interconnect delay = 7.000 ns ( 38.46 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "18.200 ns" { CONTROLER:U3|ACC[14] CONTROLER:U3|DB[2]~34 CONTROLER:U3|DB[2]~35 DISPLAY:U4|SEGOUT[6]~129 SEGOUT[6] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "18.200 ns" { CONTROLER:U3|ACC[14] CONTROLER:U3|DB[2]~34 CONTROLER:U3|DB[2]~35 DISPLAY:U4|SEGOUT[6]~129 SEGOUT[6] } { 0.000ns 2.000ns 1.900ns 2.200ns 0.900ns } { 0.000ns 1.700ns 1.600ns 1.600ns 6.300ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "11.600 ns" { CLK_40M counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] KEYBOARD:U2|N[3] KEYBOARD:U2|FN~27 CONTROLER:U3|ACC[14] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "11.600 ns" { CLK_40M CLK_40M~out counter:U1|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[15] KEYBOARD:U2|N[3] KEYBOARD:U2|FN~27 CONTROLER:U3|ACC[14] } { 0.000ns 0.000ns 0.400ns 3.800ns 1.400ns 1.300ns } { 0.000ns 2.000ns 0.500ns 0.500ns 1.700ns 0.000ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "KEYLOCK" "UNKNOWN" "V1" "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/db/KEYLOCK.quartus_db" { Floorplan "D:/lock/LOCK/KEYLOCK(少键版)/KEYLOCK/" "" "18.200 ns" { CONTROLER:U3|ACC[14] CONTROLER:U3|DB[2]~34 CONTROLER:U3|DB[2]~35 DISPLAY:U4|SEGOUT[6]~129 SEGOUT[6] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "18.200 ns" { CONTROLER:U3|ACC[14] CONTROLER:U3|DB[2]~34 CONTROLER:U3|DB[2]~35 DISPLAY:U4|SEGOUT[6]~129 SEGOUT[6] } { 0.000ns 2.000ns 1.900ns 2.200ns 0.900ns } { 0.000ns 1.700ns 1.600ns 1.600ns 6.300ns } } } } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
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