lib.dls

用FPGA实现DDS的信号发生器（正弦波125kHz）

DLSL
1
DATAROM1.VHDLVIEW U8457579.DLS
DATAROM1-SYN.SYNTHESISVIEW U4177985.DLS
DATAROM1-SYN.VHDLVIEW U7541630.DLS
DDSC1.VHDLVIEW U0380365.DLS
DDSC1-BEHAVE.SYNTHESISVIEW U1448397.DLS
DDSC1-BEHAVE.VHDLVIEW U8575607.DLS
DDSC2.VHDLVIEW U2344276.DLS
DDSC2-BEHAVE.SYNTHESISVIEW U6211657.DLS
DDSC2-BEHAVE.VHDLVIEW U5375139.DLS
DDSMAIN.VHDLVIEW U4641284.DLS
DDSMAIN-BEHAVE.SYNTHESISVIEW U0481006.DLS
DDSMAIN-BEHAVE.VHDLVIEW U3687269.DLS
FCON.VHDLVIEW U4475299.DLS
FCON-BEHAVE.SYNTHESISVIEW U2243391.DLS
FCON-BEHAVE.VHDLVIEW U9029394.DLS
F_DIV.VHDLVIEW U5560980.DLS
F_DIV-F_HAV.SYNTHESISVIEW U0055697.DLS
F_DIV-F_HAV.VHDLVIEW U9541080.DLS