ddsmain.rpt

用FPGA实现DDS的信号发生器（正弦波125kHz）

-- Equation name is '_LC8_C1', type is buried 
_LC8_C1  = DFFE( VCC, GLOBAL( sysclk),  VCC,  VCC,  VCC);

-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|LPM_ADD_SUB:204|addcore:adder|pcarry2' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC4_C8', type is buried 
_LC4_C8  = LCELL( _EQ021);
  _EQ021 =  _LC3_C8 &  _LC8_C1
         #  _LC3_C1 &  _LC6_C2 &  _LC8_C1;

-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|LPM_ADD_SUB:204|addcore:adder|pcarry4' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC5_C8', type is buried 
_LC5_C8  = LCELL( _EQ022);
  _EQ022 =  _LC4_C8 &  _LC5_C2 &  _LC7_C8
         #  _LC4_C8 &  _LC7_C8 &  _LC8_C1
         #  _LC5_C2 &  _LC8_C1;

-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|LPM_ADD_SUB:204|addcore:adder|:99' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC4_C16', type is buried 
_LC4_C16 = LCELL( _EQ023);
  _EQ023 =  _LC4_C2 &  _LC5_C8 &  _LC7_C2;

-- Node name is '|ddsc2:i_ddsc|~174~1' 
-- Equation name is '_LC2_C16', type is buried 
-- synthesized logic cell 
_LC2_C16 = LCELL( _EQ024);
  _EQ024 = !_LC5_C16
         # !_LC7_C16
         # !_LC1_C8 & !_LC2_C8;

-- Node name is '|ddsc2:i_ddsc|:174' 
-- Equation name is '_LC1_C2', type is buried 
!_LC1_C2 = _LC1_C2~NOT;
_LC1_C2~NOT = LCELL( _EQ025);
  _EQ025 =  _LC2_C16
         # !_LC3_C2
         # !_LC8_C2
         # !_LC8_C16;

-- Node name is '|ddsc2:i_ddsc|:199' 
-- Equation name is '_LC2_C8', type is buried 
!_LC2_C8 = _LC2_C8~NOT;
_LC2_C8~NOT = LCELL( _EQ026);
  _EQ026 = !_LC6_C8
         # !_LC8_C8
         # !_LC4_C1
         # !_LC2_C2;

-- Node name is '|fcon:i_fcon|:13' = '|fcon:i_fcon|clkcount0' 
-- Equation name is '_LC6_F23', type is buried 
_LC6_F23 = DFFE( _EQ027, !_LC2_E24,  VCC,  VCC,  VCC);
  _EQ027 = !_LC2_F23 & !_LC6_F23
         # !_LC4_F23 & !_LC6_F23
         # !_LC3_F21 & !_LC6_F23;

-- Node name is '|fcon:i_fcon|:12' = '|fcon:i_fcon|clkcount1' 
-- Equation name is '_LC1_F23', type is buried 
_LC1_F23 = DFFE( _EQ028, !_LC2_E24,  VCC,  VCC,  VCC);
  _EQ028 = !_LC1_F23 &  _LC6_F23 &  _LC8_F21
         # !_LC1_F23 &  _LC6_F23 &  _LC8_F23
         #  _LC1_F23 & !_LC6_F23 &  _LC8_F21
         #  _LC1_F23 & !_LC6_F23 &  _LC8_F23;

-- Node name is '|fcon:i_fcon|:11' = '|fcon:i_fcon|clkcount2' 
-- Equation name is '_LC4_F24', type is buried 
_LC4_F24 = DFFE( _EQ029, !_LC2_E24,  VCC,  VCC,  VCC);
  _EQ029 = !_LC2_F36 &  _LC4_F24 &  _LC8_F21
         # !_LC2_F36 &  _LC4_F24 &  _LC8_F23
         #  _LC2_F36 & !_LC4_F24 &  _LC8_F21
         #  _LC2_F36 & !_LC4_F24 &  _LC8_F23;

-- Node name is '|fcon:i_fcon|:10' = '|fcon:i_fcon|clkcount3' 
-- Equation name is '_LC3_F24', type is buried 
_LC3_F24 = DFFE( _EQ030, !_LC2_E24,  VCC,  VCC,  VCC);
  _EQ030 =  _LC2_F21 &  _LC3_F24 & !_LC4_F24
         #  _LC2_F21 & !_LC2_F36 &  _LC3_F24
         #  _LC2_F21 &  _LC2_F36 & !_LC3_F24 &  _LC4_F24;

-- Node name is '|fcon:i_fcon|:9' = '|fcon:i_fcon|clkcount4' 
-- Equation name is '_LC7_F24', type is buried 
_LC7_F24 = DFFE( _EQ031, !_LC2_E24,  VCC,  VCC,  VCC);
  _EQ031 = !_LC1_F24 &  _LC7_F24 &  _LC8_F21
         # !_LC1_F24 &  _LC7_F24 &  _LC8_F23
         #  _LC1_F24 & !_LC7_F24 &  _LC8_F21
         #  _LC1_F24 & !_LC7_F24 &  _LC8_F23;

-- Node name is '|fcon:i_fcon|:8' = '|fcon:i_fcon|clkcount5' 
-- Equation name is '_LC2_F24', type is buried 
_LC2_F24 = DFFE( _EQ032, !_LC2_E24,  VCC,  VCC,  VCC);
  _EQ032 =  _LC2_F21 &  _LC2_F24 & !_LC7_F24
         # !_LC1_F24 &  _LC2_F21 &  _LC2_F24
         #  _LC1_F24 &  _LC2_F21 & !_LC2_F24 &  _LC7_F24;

-- Node name is '|fcon:i_fcon|:15' = '|fcon:i_fcon|clkcount20' 
-- Equation name is '_LC7_F23', type is buried 
_LC7_F23 = DFFE( _EQ033, !_LC2_E24,  VCC,  VCC,  VCC);
  _EQ033 =  _LC7_F23
         #  _LC1_F21 &  _LC4_F21 & !_LC5_F23;

-- Node name is '|fcon:i_fcon|:14' = '|fcon:i_fcon|clkcount21' 
-- Equation name is '_LC5_F23', type is buried 
_LC5_F23 = DFFE( _LC5_F23, !_LC2_E24,  VCC,  VCC,  VCC);

-- Node name is '|fcon:i_fcon|:5' = '|fcon:i_fcon|current_state0' 
-- Equation name is '_LC5_F21', type is buried 
_LC5_F21 = DFFE( _EQ034, !_LC2_E24,  VCC,  VCC,  VCC);
  _EQ034 =  _LC6_F21 &  _LC7_F21
         #  _LC5_F21 &  _LC7_F21
         #  _LC3_F23 & !_LC5_F21 & !_LC6_F21;

-- Node name is '|fcon:i_fcon|:4' = '|fcon:i_fcon|current_state1' 
-- Equation name is '_LC6_F21', type is buried 
_LC6_F21 = DFFE( _EQ035, !_LC2_E24,  VCC,  VCC,  VCC);
  _EQ035 = !_LC5_F21 &  _LC6_F21
         # !_LC1_F21 &  _LC6_F21
         #  _LC2_F19 &  _LC5_F21 & !_LC6_F21;

-- Node name is '|fcon:i_fcon|:6' = '|fcon:i_fcon|flog' 
-- Equation name is '_LC1_F28', type is buried 
_LC1_F28 = DFFE(!_LC5_F21, !_LC2_E24,  VCC,  VCC,  VCC);

-- Node name is '|fcon:i_fcon|:3' = '|fcon:i_fcon|fnot' 
-- Equation name is '_LC4_F28', type is buried 
_LC4_F28 = DFFE( VCC, !_LC2_E24,  VCC,  VCC,  VCC);

-- Node name is '|fcon:i_fcon|LPM_ADD_SUB:62|addcore:adder|:67' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC2_F36', type is buried 
_LC2_F36 = LCELL( _EQ036);
  _EQ036 =  _LC1_F23 &  _LC6_F23;

-- Node name is '|fcon:i_fcon|LPM_ADD_SUB:62|addcore:adder|:75' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC1_F24', type is buried 
_LC1_F24 = LCELL( _EQ037);
  _EQ037 =  _LC2_F36 &  _LC3_F24 &  _LC4_F24;

-- Node name is '|fcon:i_fcon|:70' 
-- Equation name is '_LC4_F23', type is buried 
!_LC4_F23 = _LC4_F23~NOT;
_LC4_F23~NOT = LCELL( _EQ038);
  _EQ038 =  _LC5_F23
         #  _LC7_F23;

-- Node name is '|fcon:i_fcon|~93~1' 
-- Equation name is '_LC6_F24', type is buried 
-- synthesized logic cell 
_LC6_F24 = LCELL( _EQ039);
  _EQ039 =  _LC1_F23
         #  _LC2_F24
         # !_LC3_F24;

-- Node name is '|fcon:i_fcon|:93' 
-- Equation name is '_LC2_F23', type is buried 
!_LC2_F23 = _LC2_F23~NOT;
_LC2_F23~NOT = LCELL( _EQ040);
  _EQ040 =  _LC6_F23
         # !_LC4_F24
         # !_LC7_F24
         #  _LC6_F24;

-- Node name is '|fcon:i_fcon|:169' 
-- Equation name is '_LC2_F19', type is buried 
!_LC2_F19 = _LC2_F19~NOT;
_LC2_F19~NOT = LCELL( _EQ041);
  _EQ041 = !_LC6_F23
         #  _LC6_F24
         #  _LC4_F24
         #  _LC7_F24;

-- Node name is '|fcon:i_fcon|~323~1' 
-- Equation name is '_LC8_F24', type is buried 
-- synthesized logic cell 
_LC8_F24 = LCELL( _EQ042);
  _EQ042 = !_LC7_F24
         #  _LC2_F24
         #  _LC3_F24;

-- Node name is '|fcon:i_fcon|:323' 
-- Equation name is '_LC1_F21', type is buried 
!_LC1_F21 = _LC1_F21~NOT;
_LC1_F21~NOT = LCELL( _EQ043);
  _EQ043 =  _LC4_F24
         #  _LC8_F24
         # !_LC2_F36;

-- Node name is '|fcon:i_fcon|:432' 
-- Equation name is '_LC3_F21', type is buried 
_LC3_F21 = LCELL( _EQ044);
  _EQ044 = !_LC5_F21 & !_LC6_F21;

-- Node name is '|fcon:i_fcon|:579' 
-- Equation name is '_LC5_F24', type is buried 
!_LC5_F24 = _LC5_F24~NOT;
_LC5_F24~NOT = LCELL( _EQ045);
  _EQ045 = !_LC4_F24
         # !_LC7_F24
         # !_LC6_F23
         #  _LC6_F24;

-- Node name is '|fcon:i_fcon|~1022~1' 
-- Equation name is '_LC7_F21', type is buried 
-- synthesized logic cell 
_LC7_F21 = LCELL( _EQ046);
  _EQ046 = !_LC2_F19 &  _LC5_F21 & !_LC6_F21
         #  _LC2_F19 & !_LC5_F21 &  _LC6_F21
         # !_LC1_F21 &  _LC5_F21 &  _LC6_F21;

-- Node name is '|fcon:i_fcon|~1022~2' 
-- Equation name is '_LC3_F23', type is buried 
-- synthesized logic cell 
_LC3_F23 = LCELL( _EQ047);
  _EQ047 =  _LC2_F23 & !_LC5_F23 & !_LC7_F23
         #  _LC5_F23 &  _LC5_F24
         #  _LC5_F24 &  _LC7_F23;

-- Node name is '|fcon:i_fcon|~1040~1' 
-- Equation name is '_LC8_F23', type is buried 
-- synthesized logic cell 
_LC8_F23 = LCELL( _EQ048);
  _EQ048 = !_LC2_F23 &  _LC3_F21 &  _LC4_F23
         #  _LC3_F21 & !_LC4_F23 & !_LC5_F24;

-- Node name is '|fcon:i_fcon|~1040~2' 
-- Equation name is '_LC2_F21', type is buried 
-- synthesized logic cell 
_LC2_F21 = LCELL( _EQ049);
  _EQ049 =  _LC8_F23
         # !_LC2_F19 &  _LC5_F21
         # !_LC2_F19 &  _LC6_F21
         #  _LC5_F21 &  _LC6_F21;

-- Node name is '|fcon:i_fcon|~1052~1' 
-- Equation name is '_LC8_F21', type is buried 
-- synthesized logic cell 
_LC8_F21 = LCELL( _EQ050);
  _EQ050 = !_LC2_F19 &  _LC5_F21 & !_LC6_F21
         # !_LC2_F19 & !_LC5_F21 &  _LC6_F21
         # !_LC1_F21 &  _LC5_F21 &  _LC6_F21;

-- Node name is '|fcon:i_fcon|~1071~1' 
-- Equation name is '_LC4_F21', type is buried 
-- synthesized logic cell 
_LC4_F21 = LCELL( _EQ051);
  _EQ051 =  _LC5_F21 &  _LC6_F21;

-- Node name is '|fcon:i_fcon|:1123' 
-- Equation name is '_LC8_A7', type is buried 
!_LC8_A7 = _LC8_A7~NOT;