📄 ddsmain.rpt
字号:
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
p = Packed register
Device-Specific Information: f:\muxfile\sin125\ddsmain.rpt
ddsmain
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 15/144( 10%) 1/ 72( 1%) 0/ 72( 0%) 0/16( 0%) 1/16( 6%) 0/16( 0%)
B: 1/144( 0%) 0/ 72( 0%) 0/ 72( 0%) 0/16( 0%) 1/16( 6%) 0/16( 0%)
C: 25/144( 17%) 0/ 72( 0%) 0/ 72( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
D: 0/144( 0%) 0/ 72( 0%) 0/ 72( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
E: 2/144( 1%) 0/ 72( 0%) 0/ 72( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
F: 21/144( 14%) 0/ 72( 0%) 0/ 72( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 4/24( 16%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
06: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
07: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
08: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
09: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 3/24( 12%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
25: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
26: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
27: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
28: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
29: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
30: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
31: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
32: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
33: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
34: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
35: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
36: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: f:\muxfile\sin125\ddsmain.rpt
ddsmain
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 45 sysclk
DFF 14 |f_div:i_fdiv|div_clk1
Device-Specific Information: f:\muxfile\sin125\ddsmain.rpt
ddsmain
** EQUATIONS **
sysclk : INPUT;
-- Node name is 'clkout'
-- Equation name is 'clkout', type is output
clkout = !_LC2_E24;
-- Node name is 'ddsout0'
-- Equation name is 'ddsout0', type is output
ddsout0 = _LC1_C32;
-- Node name is 'ddsout1'
-- Equation name is 'ddsout1', type is output
ddsout1 = _LC2_F28;
-- Node name is 'ddsout2'
-- Equation name is 'ddsout2', type is output
ddsout2 = _LC4_A10;
-- Node name is 'ddsout3'
-- Equation name is 'ddsout3', type is output
ddsout3 = _LC2_A7;
-- Node name is 'ddsout4'
-- Equation name is 'ddsout4', type is output
ddsout4 = _LC1_A7;
-- Node name is 'ddsout5'
-- Equation name is 'ddsout5', type is output
ddsout5 = _LC1_C6;
-- Node name is 'ddsout6'
-- Equation name is 'ddsout6', type is output
ddsout6 = _LC4_C6;
-- Node name is 'ddsout7'
-- Equation name is 'ddsout7', type is output
ddsout7 = _LC1_C4;
-- Node name is 'fconout'
-- Equation name is 'fconout', type is output
fconout = _LC8_A7;
-- Node name is '|ddsc2:i_ddsc|:39' = '|ddsc2:i_ddsc|acc10'
-- Equation name is '_LC6_C2', type is buried
_LC6_C2 = DFFE( _EQ001, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ001 = !_LC1_C2 & _LC2_C2;
-- Node name is '|ddsc2:i_ddsc|:38' = '|ddsc2:i_ddsc|acc11'
-- Equation name is '_LC3_C1', type is buried
_LC3_C1 = DFFE( _EQ002, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ002 = !_LC1_C2 & _LC4_C1;
-- Node name is '|ddsc2:i_ddsc|:37' = '|ddsc2:i_ddsc|acc12'
-- Equation name is '_LC3_C8', type is buried
_LC3_C8 = DFFE( _EQ003, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ003 = !_LC1_C2 & _LC8_C8;
-- Node name is '|ddsc2:i_ddsc|:36' = '|ddsc2:i_ddsc|acc13'
-- Equation name is '_LC7_C8', type is buried
_LC7_C8 = DFFE( _EQ004, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ004 = !_LC1_C2 & _LC6_C8;
-- Node name is '|ddsc2:i_ddsc|:35' = '|ddsc2:i_ddsc|acc14'
-- Equation name is '_LC5_C2', type is buried
_LC5_C2 = DFFE( _EQ005, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ005 = !_LC1_C2 & _LC1_C8;
-- Node name is '|ddsc2:i_ddsc|:34' = '|ddsc2:i_ddsc|acc15'
-- Equation name is '_LC7_C2', type is buried
_LC7_C2 = DFFE( _EQ006, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ006 = !_LC1_C2 & _LC8_C2;
-- Node name is '|ddsc2:i_ddsc|:33' = '|ddsc2:i_ddsc|acc16'
-- Equation name is '_LC4_C2', type is buried
_LC4_C2 = DFFE( _EQ007, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ007 = !_LC1_C2 & _LC3_C2;
-- Node name is '|ddsc2:i_ddsc|:32' = '|ddsc2:i_ddsc|acc17'
-- Equation name is '_LC1_C16', type is buried
_LC1_C16 = DFFE( _EQ008, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ008 = !_LC1_C2 & _LC7_C16;
-- Node name is '|ddsc2:i_ddsc|:31' = '|ddsc2:i_ddsc|acc18'
-- Equation name is '_LC3_C16', type is buried
_LC3_C16 = DFFE( _EQ009, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ009 = !_LC1_C2 & _LC5_C16;
-- Node name is '|ddsc2:i_ddsc|:30' = '|ddsc2:i_ddsc|acc19'
-- Equation name is '_LC6_C16', type is buried
_LC6_C16 = DFFE( _EQ010, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ010 = !_LC1_C2 & _LC8_C16;
-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|:82' = '|ddsc2:i_ddsc|ddsc1:c1|acc10'
-- Equation name is '_LC2_C2', type is buried
_LC2_C2 = DFFE( _EQ011, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ011 = _LC6_C2 & !_LC8_C1
# !_LC6_C2 & _LC8_C1;
-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|:81' = '|ddsc2:i_ddsc|ddsc1:c1|acc11'
-- Equation name is '_LC4_C1', type is buried
_LC4_C1 = DFFE( _EQ012, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ012 = _LC3_C1 & !_LC6_C2
# _LC3_C1 & !_LC8_C1
# !_LC3_C1 & _LC6_C2 & _LC8_C1;
-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|:80' = '|ddsc2:i_ddsc|ddsc1:c1|acc12'
-- Equation name is '_LC8_C8', type is buried
_LC8_C8 = DFFE( _EQ013, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ013 = _LC3_C1 & _LC3_C8 & _LC6_C2
# _LC3_C8 & !_LC8_C1
# !_LC3_C1 & !_LC3_C8 & _LC8_C1
# !_LC3_C8 & !_LC6_C2 & _LC8_C1;
-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|:79' = '|ddsc2:i_ddsc|ddsc1:c1|acc13'
-- Equation name is '_LC6_C8', type is buried
_LC6_C8 = DFFE( _EQ014, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ014 = !_LC4_C8 & _LC7_C8
# _LC4_C8 & !_LC7_C8;
-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|:78' = '|ddsc2:i_ddsc|ddsc1:c1|acc14'
-- Equation name is '_LC1_C8', type is buried
_LC1_C8 = DFFE( _EQ015, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ015 = _LC4_C8 & _LC5_C2 & _LC7_C8 & _LC8_C1
# _LC5_C2 & !_LC7_C8 & !_LC8_C1
# !_LC4_C8 & _LC5_C2 & !_LC8_C1
# _LC4_C8 & !_LC5_C2 & _LC7_C8 & !_LC8_C1
# !_LC5_C2 & !_LC7_C8 & _LC8_C1
# !_LC4_C8 & !_LC5_C2 & _LC8_C1;
-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|:77' = '|ddsc2:i_ddsc|ddsc1:c1|acc15'
-- Equation name is '_LC8_C2', type is buried
_LC8_C2 = DFFE( _EQ016, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ016 = !_LC5_C8 & _LC7_C2
# _LC5_C8 & !_LC7_C2;
-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|:76' = '|ddsc2:i_ddsc|ddsc1:c1|acc16'
-- Equation name is '_LC3_C2', type is buried
_LC3_C2 = DFFE( _EQ017, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ017 = _LC4_C2 & !_LC7_C2
# _LC4_C2 & !_LC5_C8
# !_LC4_C2 & _LC5_C8 & _LC7_C2;
-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|:75' = '|ddsc2:i_ddsc|ddsc1:c1|acc17'
-- Equation name is '_LC7_C16', type is buried
_LC7_C16 = DFFE( _EQ018, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ018 = _LC1_C16 & !_LC4_C16
# !_LC1_C16 & _LC4_C16;
-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|:74' = '|ddsc2:i_ddsc|ddsc1:c1|acc18'
-- Equation name is '_LC5_C16', type is buried
_LC5_C16 = DFFE( _EQ019, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ019 = !_LC1_C16 & _LC3_C16
# _LC3_C16 & !_LC4_C16
# _LC1_C16 & !_LC3_C16 & _LC4_C16;
-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|:73' = '|ddsc2:i_ddsc|ddsc1:c1|acc19'
-- Equation name is '_LC8_C16', type is buried
_LC8_C16 = DFFE( _EQ020, GLOBAL( sysclk), VCC, VCC, VCC);
_EQ020 = !_LC3_C16 & _LC6_C16
# !_LC1_C16 & _LC6_C16
# !_LC4_C16 & _LC6_C16
# _LC1_C16 & _LC3_C16 & _LC4_C16 & !_LC6_C16;
-- Node name is '|ddsc2:i_ddsc|ddsc1:c1|:58' = '|ddsc2:i_ddsc|ddsc1:c1|freqw4'
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