📄 top_clock.rpt
字号:
- 2 - C 13 OR2 ! 0 4 0 4 |counter6:U4|:14
- 3 - C 13 DFFE + 0 3 1 1 |counter6:U4|:41
- 6 - C 13 DFFE + 0 3 1 2 |counter6:U4|:42
- 5 - C 13 DFFE + 0 3 1 3 |counter6:U4|:43
- 4 - C 13 DFFE + 0 1 1 4 |counter6:U4|:44
- 1 - B 05 DFFE + 0 3 1 1 |counter10:U1|:41
- 6 - B 05 DFFE + 0 3 1 2 |counter10:U1|:42
- 8 - B 05 DFFE + 0 2 1 3 |counter10:U1|:43
- 4 - B 05 DFFE + 0 0 1 4 |counter10:U1|:44
- 4 - B 14 AND2 0 2 0 1 |counter10:U3|lpm_add_sub:45|addcore:adder|:55
- 7 - B 14 AND2 0 3 0 1 |counter10:U3|lpm_add_sub:45|addcore:adder|:59
- 3 - B 14 OR2 ! 0 4 0 5 |counter10:U3|:14
- 6 - B 14 DFFE + 0 3 1 1 |counter10:U3|:41
- 2 - B 14 DFFE + 0 3 1 2 |counter10:U3|:42
- 5 - B 14 DFFE + 0 3 1 3 |counter10:U3|:43
- 1 - B 14 DFFE + 0 1 1 4 |counter10:U3|:44
- 4 - C 17 AND2 0 3 0 2 |counter24:U5|:134
- 2 - C 17 OR2 0 2 0 3 |counter24:U5|:142
- 3 - C 20 AND2 s 0 4 0 3 |counter24:U5|~150~1
- 6 - C 17 OR2 ! 0 4 0 3 |counter24:U5|:156
- 7 - C 20 OR2 s 0 3 0 3 |counter24:U5|~181~1
- 8 - C 17 OR2 s 0 4 0 1 |counter24:U5|~191~1
- 7 - C 17 OR2 s 0 3 0 1 |counter24:U5|~192~1
- 8 - C 15 OR2 s 0 3 0 1 |counter24:U5|~193~1
- 1 - C 17 DFFE + 0 3 1 4 |counter24:U5|:208
- 5 - C 17 DFFE + 0 3 1 5 |counter24:U5|:209
- 7 - C 15 DFFE + 0 3 1 4 |counter24:U5|:210
- 1 - C 15 DFFE + 0 2 1 3 |counter24:U5|:211
- 6 - C 20 OR2 0 4 0 1 |counter24:U5|:262
- 3 - C 17 OR2 s 0 3 0 1 |counter24:U5|~274~1
- 2 - C 20 OR2 s 0 4 0 1 |counter24:U5|~274~2
- 5 - C 20 AND2 s 0 4 0 6 |counter24:U5|~274~3
- 4 - C 20 OR2 s 0 3 0 1 |counter24:U5|~275~1
- 3 - C 19 DFFE + 0 1 1 2 |counter24:U5|:281
- 3 - C 15 DFFE + 0 1 1 2 |counter24:U5|:282
- 1 - C 20 DFFE + 0 3 1 3 |counter24:U5|:283
- 8 - C 20 DFFE + 0 3 1 4 |counter24:U5|:284
- 7 - B 05 OR2 ! 0 4 0 7 :29
- 2 - C 15 AND2 ! 1 1 0 4 :43
- 4 - C 15 OR2 s ! 0 2 0 3 ~68~1
- 6 - C 15 OR2 ! 1 2 0 4 :69
- 5 - C 15 OR2 ! 1 3 0 9 :90
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: f:\workhard\top_clock.rpt
top_clock
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 1/ 96( 1%) 0/ 48( 0%) 4/ 48( 8%) 0/16( 0%) 4/16( 25%) 0/16( 0%)
B: 0/ 96( 0%) 4/ 48( 8%) 5/ 48( 10%) 0/16( 0%) 8/16( 50%) 0/16( 0%)
C: 5/ 96( 5%) 0/ 48( 0%) 17/ 48( 35%) 0/16( 0%) 8/16( 50%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
14: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
15: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
18: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: f:\workhard\top_clock.rpt
top_clock
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 24 CP
Device-Specific Information: f:\workhard\top_clock.rpt
top_clock
** CLEAR SIGNALS **
Type Fan-out Name
INPUT 24 nCR
Device-Specific Information: f:\workhard\top_clock.rpt
top_clock
** EQUATIONS **
Adj_Hour : INPUT;
Adj_Min : INPUT;
CP : INPUT;
nCR : INPUT;
-- Node name is 'Hour0'
-- Equation name is 'Hour0', type is output
Hour0 = _LC1_C15;
-- Node name is 'Hour1'
-- Equation name is 'Hour1', type is output
Hour1 = _LC7_C15;
-- Node name is 'Hour2'
-- Equation name is 'Hour2', type is output
Hour2 = _LC5_C17;
-- Node name is 'Hour3'
-- Equation name is 'Hour3', type is output
Hour3 = _LC1_C17;
-- Node name is 'Hour4'
-- Equation name is 'Hour4', type is output
Hour4 = _LC8_C20;
-- Node name is 'Hour5'
-- Equation name is 'Hour5', type is output
Hour5 = _LC1_C20;
-- Node name is 'Hour6'
-- Equation name is 'Hour6', type is output
Hour6 = _LC3_C15;
-- Node name is 'Hour7'
-- Equation name is 'Hour7', type is output
Hour7 = _LC3_C19;
-- Node name is 'Minute0'
-- Equation name is 'Minute0', type is output
Minute0 = _LC1_B14;
-- Node name is 'Minute1'
-- Equation name is 'Minute1', type is output
Minute1 = _LC5_B14;
-- Node name is 'Minute2'
-- Equation name is 'Minute2', type is output
Minute2 = _LC2_B14;
-- Node name is 'Minute3'
-- Equation name is 'Minute3', type is output
Minute3 = _LC6_B14;
-- Node name is 'Minute4'
-- Equation name is 'Minute4', type is output
Minute4 = _LC4_C13;
-- Node name is 'Minute5'
-- Equation name is 'Minute5', type is output
Minute5 = _LC5_C13;
-- Node name is 'Minute6'
-- Equation name is 'Minute6', type is output
Minute6 = _LC6_C13;
-- Node name is 'Minute7'
-- Equation name is 'Minute7', type is output
Minute7 = _LC3_C13;
-- Node name is 'Second0'
-- Equation name is 'Second0', type is output
Second0 = _LC4_B5;
-- Node name is 'Second1'
-- Equation name is 'Second1', type is output
Second1 = _LC8_B5;
-- Node name is 'Second2'
-- Equation name is 'Second2', type is output
Second2 = _LC6_B5;
-- Node name is 'Second3'
-- Equation name is 'Second3', type is output
Second3 = _LC1_B5;
-- Node name is 'Second4'
-- Equation name is 'Second4', type is output
Second4 = _LC3_A13;
-- Node name is 'Second5'
-- Equation name is 'Second5', type is output
Second5 = _LC8_A13;
-- Node name is 'Second6'
-- Equation name is 'Second6', type is output
Second6 = _LC4_A13;
-- Node name is 'Second7'
-- Equation name is 'Second7', type is output
Second7 = _LC5_A13;
-- Node name is '|counter6:U2|lpm_add_sub:45|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC1_A13', type is buried
_LC1_A13 = LCELL( _EQ001);
_EQ001 = _LC3_A13 & _LC8_A13;
-- Node name is '|counter6:U2|lpm_add_sub:45|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC2_A13', type is buried
_LC2_A13 = LCELL( _EQ002);
_EQ002 = _LC3_A13 & _LC4_A13 & _LC8_A13;
-- Node name is '|counter6:U2|:14'
-- Equation name is '_LC7_A13', type is buried
!_LC7_A13 = _LC7_A13~NOT;
_LC7_A13~NOT = LCELL( _EQ003);
_EQ003 = !_LC4_A13
# _LC8_A13
# _LC5_A13
# !_LC3_A13;
-- Node name is '|counter6:U2|:41'
-- Equation name is '_LC5_A13', type is buried
_LC5_A13 = DFFE( _EQ004, GLOBAL( CP), GLOBAL( nCR), VCC, VCC);
_EQ004 = _LC5_A13 & !_LC7_B5
# !_LC2_A13 & _LC5_A13 & !_LC7_A13
# _LC2_A13 & !_LC5_A13 & !_LC7_A13 & _LC7_B5;
-- Node name is '|counter6:U2|:42'
-- Equation name is '_LC4_A13', type is buried
_LC4_A13 = DFFE( _EQ005, GLOBAL( CP), GLOBAL( nCR), VCC, VCC);
_EQ005 = _LC4_A13 & !_LC7_B5
# !_LC1_A13 & _LC4_A13 & !_LC7_A13
# _LC1_A13 & !_LC4_A13 & !_LC7_A13 & _LC7_B5;
-- Node name is '|counter6:U2|:43'
-- Equation name is '_LC8_A13', type is buried
_LC8_A13 = DFFE( _EQ006, GLOBAL( CP), GLOBAL( nCR), VCC, VCC);
_EQ006 = !_LC7_B5 & _LC8_A13
# !_LC3_A13 & !_LC7_A13 & _LC8_A13
# _LC3_A13 & !_LC7_A13 & _LC7_B5 & !_LC8_A13;
-- Node name is '|counter6:U2|:44'
-- Equation name is '_LC3_A13', type is buried
_LC3_A13 = DFFE( _EQ007, GLOBAL( CP), GLOBAL( nCR), VCC, VCC);
_EQ007 = !_LC3_A13 & _LC7_B5
# _LC3_A13 & !_LC7_B5;
-- Node name is '|counter6:U4|lpm_add_sub:45|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC1_C13', type is buried
_LC1_C13 = LCELL( _EQ008);
_EQ008 = _LC4_C13 & _LC5_C13;
-- Node name is '|counter6:U4|lpm_add_sub:45|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC7_C13', type is buried
_LC7_C13 = LCELL( _EQ009);
_EQ009 = _LC4_C13 & _LC5_C13 & _LC6_C13;
-- Node name is '|counter6:U4|:14'
-- Equation name is '_LC2_C13', type is buried
!_LC2_C13 = _LC2_C13~NOT;
_LC2_C13~NOT = LCELL( _EQ010);
_EQ010 = !_LC6_C13
# _LC5_C13
# _LC3_C13
# !_LC4_C13;
-- Node name is '|counter6:U4|:41'
-- Equation name is '_LC3_C13', type is buried
_LC3_C13 = DFFE( _EQ011, GLOBAL( CP), GLOBAL( nCR), VCC, VCC);
_EQ011 = _LC3_C13 & !_LC6_C15
# !_LC2_C13 & _LC3_C13 & !_LC7_C13
# !_LC2_C13 & !_LC3_C13 & _LC6_C15 & _LC7_C13;
-- Node name is '|counter6:U4|:42'
-- Equation name is '_LC6_C13', type is buried
_LC6_C13 = DFFE( _EQ012, GLOBAL( CP), GLOBAL( nCR), VCC, VCC);
_EQ012 = _LC6_C13 & !_LC6_C15
# !_LC1_C13 & !_LC2_C13 & _LC6_C13
# _LC1_C13 & !_LC2_C13 & !_LC6_C13 & _LC6_C15;
-- Node name is '|counter6:U4|:43'
-- Equation name is '_LC5_C13', type is buried
_LC5_C13 = DFFE( _EQ013, GLOBAL( CP), GLOBAL( nCR), VCC, VCC);
_EQ013 = _LC5_C13 & !_LC6_C15
# !_LC2_C13 & !_LC4_C13 & _LC5_C13
# !_LC2_C13 & _LC4_C13 & !_LC5_C13 & _LC6_C15;
-- Node name is '|counter6:U4|:44'
-- Equation name is '_LC4_C13', type is buried
_LC4_C13 = DFFE( _EQ014, GLOBAL( CP), GLOBAL( nCR), VCC, VCC);
_EQ014 = !_LC4_C13 & _LC6_C15
# _LC4_C13 & !_LC6_C15;
-- Node name is '|counter10:U1|:41'
-- Equation name is '_LC1_B5', type is buried
_LC1_B5 = DFFE( _EQ015, GLOBAL( CP), GLOBAL( nCR), VCC, VCC);
_EQ015 = _LC1_B5 & !_LC4_B5
# !_LC1_B5 & _LC4_B5 & _LC6_B5 & _LC8_B5
# _LC1_B5 & _LC6_B5 & !_LC8_B5
# _LC1_B5 & !_LC6_B5 & _LC8_B5;
-- Node name is '|counter10:U1|:42'
-- Equation name is '_LC6_B5', type is buried
_LC6_B5 = DFFE( _EQ016, GLOBAL( CP), GLOBAL( nCR), VCC, VCC);
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