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📄 top_clock.rpt

📁 数字钟 可实现正常计数校准 还有方电台报时功能 四低一高 闹钟功能
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-- Node name is '|counter24:UT3|:280' 
-- Equation name is '_LC8_B8', type is buried 
_LC8_B8  = DFFE( _EQ017, !_LC3_C18, GLOBAL( nCR),  VCC,  VCC);
  _EQ017 = !EN &  _LC8_B8;

-- Node name is '|counter24:UT3|:281' 
-- Equation name is '_LC5_B8', type is buried 
_LC5_B8  = DFFE( _EQ018, !_LC3_C18, GLOBAL( nCR),  VCC,  VCC);
  _EQ018 = !EN &  _LC5_B8;

-- Node name is '|counter24:UT3|:282' 
-- Equation name is '_LC1_B10', type is buried 
_LC1_B10 = DFFE( _EQ019, !_LC3_C18, GLOBAL( nCR),  VCC,  VCC);
  _EQ019 =  _LC3_B10 &  _LC7_B10
         # !EN &  _LC1_B10;

-- Node name is '|counter24:UT3|:283' 
-- Equation name is '_LC4_B10', type is buried 
_LC4_B10 = DFFE( _EQ020, !_LC3_C18, GLOBAL( nCR),  VCC,  VCC);
  _EQ020 =  _LC3_B10 &  _LC6_B10
         # !EN &  _LC4_B10;

-- Node name is '|counter60:UT1|counter6:UC1|lpm_add_sub:45|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC3_C21', type is buried 
_LC3_C21 = LCELL( _EQ021);
  _EQ021 =  _LC6_C21 &  _LC7_C21;

-- Node name is '|counter60:UT1|counter6:UC1|lpm_add_sub:45|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_C21', type is buried 
_LC8_C21 = LCELL( _EQ022);
  _EQ022 =  _LC4_C21 &  _LC6_C21 &  _LC7_C21;

-- Node name is '|counter60:UT1|counter6:UC1|:14' 
-- Equation name is '_LC1_C21', type is buried 
!_LC1_C21 = _LC1_C21~NOT;
_LC1_C21~NOT = LCELL( _EQ023);
  _EQ023 = !_LC4_C21
         #  _LC6_C21
         #  _LC5_C21
         # !_LC7_C21;

-- Node name is '|counter60:UT1|counter6:UC1|:41' 
-- Equation name is '_LC5_C21', type is buried 
_LC5_C21 = DFFE( _EQ024, GLOBAL( CP), GLOBAL( nCR),  VCC,  VCC);
  _EQ024 = !_LC1_B15 &  _LC5_C21
         # !_LC1_C21 &  _LC5_C21 & !_LC8_C21
         #  _LC1_B15 & !_LC1_C21 & !_LC5_C21 &  _LC8_C21;

-- Node name is '|counter60:UT1|counter6:UC1|:42' 
-- Equation name is '_LC4_C21', type is buried 
_LC4_C21 = DFFE( _EQ025, GLOBAL( CP), GLOBAL( nCR),  VCC,  VCC);
  _EQ025 = !_LC1_B15 &  _LC4_C21
         # !_LC1_C21 & !_LC3_C21 &  _LC4_C21
         #  _LC1_B15 & !_LC1_C21 &  _LC3_C21 & !_LC4_C21;

-- Node name is '|counter60:UT1|counter6:UC1|:43' 
-- Equation name is '_LC6_C21', type is buried 
_LC6_C21 = DFFE( _EQ026, GLOBAL( CP), GLOBAL( nCR),  VCC,  VCC);
  _EQ026 = !_LC1_B15 &  _LC6_C21
         # !_LC1_C21 &  _LC6_C21 & !_LC7_C21
         #  _LC1_B15 & !_LC1_C21 & !_LC6_C21 &  _LC7_C21;

-- Node name is '|counter60:UT1|counter6:UC1|:44' 
-- Equation name is '_LC7_C21', type is buried 
_LC7_C21 = DFFE( _EQ027, GLOBAL( CP), GLOBAL( nCR),  VCC,  VCC);
  _EQ027 =  _LC1_B15 & !_LC7_C21
         # !_LC1_B15 &  _LC7_C21;

-- Node name is '|counter60:UT1|counter10:UC0|lpm_add_sub:45|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_B15', type is buried 
_LC8_B15 = LCELL( _EQ028);
  _EQ028 =  _LC2_B15 &  _LC5_B15 &  _LC7_B15;

-- Node name is '|counter60:UT1|counter10:UC0|lpm_add_sub:45|addcore:adder|:68' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC4_B15', type is buried 
_LC4_B15 = LCELL( _EQ029);
  _EQ029 = !_LC2_B15 &  _LC5_B15
         #  _LC5_B15 & !_LC7_B15
         #  _LC2_B15 & !_LC5_B15 &  _LC7_B15;

-- Node name is '|counter60:UT1|counter10:UC0|:41' 
-- Equation name is '_LC3_B15', type is buried 
_LC3_B15 = DFFE( _EQ030, GLOBAL( CP), GLOBAL( nCR),  VCC,  VCC);
  _EQ030 = !_LC1_B15 &  _LC3_B15 & !_LC8_B15
         #  EN & !_LC1_B15 & !_LC3_B15 &  _LC8_B15
         # !EN &  _LC3_B15;

-- Node name is '|counter60:UT1|counter10:UC0|:42' 
-- Equation name is '_LC5_B15', type is buried 
_LC5_B15 = DFFE( _EQ031, GLOBAL( CP), GLOBAL( nCR),  VCC,  VCC);
  _EQ031 =  EN & !_LC1_B15 &  _LC4_B15
         # !EN &  _LC5_B15;

-- Node name is '|counter60:UT1|counter10:UC0|:43' 
-- Equation name is '_LC2_B15', type is buried 
_LC2_B15 = DFFE( _EQ032, GLOBAL( CP), GLOBAL( nCR),  VCC,  VCC);
  _EQ032 = !_LC1_B15 &  _LC2_B15 & !_LC7_B15
         #  EN & !_LC1_B15 & !_LC2_B15 &  _LC7_B15
         # !EN &  _LC2_B15;

-- Node name is '|counter60:UT1|counter10:UC0|:44' 
-- Equation name is '_LC7_B15', type is buried 
_LC7_B15 = DFFE( _EQ033, GLOBAL( CP), GLOBAL( nCR),  VCC,  VCC);
  _EQ033 =  EN & !_LC7_B15
         # !EN &  _LC7_B15;

-- Node name is '|counter60:UT1|:12' 
-- Equation name is '_LC1_B15', type is buried 
!_LC1_B15 = _LC1_B15~NOT;
_LC1_B15~NOT = LCELL( _EQ034);
  _EQ034 =  _LC5_B15
         #  _LC2_B15
         # !_LC3_B15
         # !_LC7_B15;

-- Node name is '|counter60:UT2|counter6:UC1|lpm_add_sub:45|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC2_C18', type is buried 
_LC2_C18 = LCELL( _EQ035);
  _EQ035 =  _LC4_C23 &  _LC6_C18;

-- Node name is '|counter60:UT2|counter6:UC1|lpm_add_sub:45|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC4_C18', type is buried 
_LC4_C18 = LCELL( _EQ036);
  _EQ036 =  _LC4_C23 &  _LC6_C18 &  _LC7_C18;

-- Node name is '|counter60:UT2|counter6:UC1|:14' 
-- Equation name is '_LC1_C18', type is buried 
!_LC1_C18 = _LC1_C18~NOT;
_LC1_C18~NOT = LCELL( _EQ037);
  _EQ037 = !_LC7_C18
         #  _LC6_C18
         #  _LC8_C18
         # !_LC4_C23;

-- Node name is '|counter60:UT2|counter6:UC1|:41' 
-- Equation name is '_LC8_C18', type is buried 
_LC8_C18 = DFFE( _EQ038, !_LC2_C21, GLOBAL( nCR),  VCC,  VCC);
  _EQ038 = !_LC2_C23 &  _LC8_C18
         # !_LC1_C18 & !_LC4_C18 &  _LC8_C18
         # !_LC1_C18 &  _LC2_C23 &  _LC4_C18 & !_LC8_C18;

-- Node name is '|counter60:UT2|counter6:UC1|:42' 
-- Equation name is '_LC7_C18', type is buried 
_LC7_C18 = DFFE( _EQ039, !_LC2_C21, GLOBAL( nCR),  VCC,  VCC);
  _EQ039 = !_LC2_C23 &  _LC7_C18
         # !_LC1_C18 & !_LC2_C18 &  _LC7_C18
         # !_LC1_C18 &  _LC2_C18 &  _LC2_C23 & !_LC7_C18;

-- Node name is '|counter60:UT2|counter6:UC1|:43' 
-- Equation name is '_LC6_C18', type is buried 
_LC6_C18 = DFFE( _EQ040, !_LC2_C21, GLOBAL( nCR),  VCC,  VCC);
  _EQ040 = !_LC2_C23 &  _LC6_C18
         # !_LC1_C18 & !_LC4_C23 &  _LC6_C18
         # !_LC1_C18 &  _LC2_C23 &  _LC4_C23 & !_LC6_C18;

-- Node name is '|counter60:UT2|counter6:UC1|:44' 
-- Equation name is '_LC4_C23', type is buried 
_LC4_C23 = DFFE( _EQ041, !_LC2_C21, GLOBAL( nCR),  VCC,  VCC);
  _EQ041 =  _LC2_C23 & !_LC4_C23
         # !_LC2_C23 &  _LC4_C23;

-- Node name is '|counter60:UT2|counter10:UC0|lpm_add_sub:45|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_C23', type is buried 
_LC8_C23 = LCELL( _EQ042);
  _EQ042 =  _LC1_C23 &  _LC3_C23 &  _LC6_C23;

-- Node name is '|counter60:UT2|counter10:UC0|lpm_add_sub:45|addcore:adder|:68' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC7_C23', type is buried 
_LC7_C23 = LCELL( _EQ043);
  _EQ043 =  _LC3_C23 & !_LC6_C23
         # !_LC1_C23 &  _LC3_C23
         #  _LC1_C23 & !_LC3_C23 &  _LC6_C23;

-- Node name is '|counter60:UT2|counter10:UC0|:41' 
-- Equation name is '_LC5_C23', type is buried 
_LC5_C23 = DFFE( _EQ044, !_LC2_C21, GLOBAL( nCR),  VCC,  VCC);
  _EQ044 = !_LC2_C23 &  _LC5_C23 & !_LC8_C23
         #  EN & !_LC2_C23 & !_LC5_C23 &  _LC8_C23
         # !EN &  _LC5_C23;

-- Node name is '|counter60:UT2|counter10:UC0|:42' 
-- Equation name is '_LC3_C23', type is buried 
_LC3_C23 = DFFE( _EQ045, !_LC2_C21, GLOBAL( nCR),  VCC,  VCC);
  _EQ045 =  EN & !_LC2_C23 &  _LC7_C23
         # !EN &  _LC3_C23;

-- Node name is '|counter60:UT2|counter10:UC0|:43' 
-- Equation name is '_LC6_C23', type is buried 
_LC6_C23 = DFFE( _EQ046, !_LC2_C21, GLOBAL( nCR),  VCC,  VCC);
  _EQ046 = !_LC1_C23 & !_LC2_C23 &  _LC6_C23
         #  EN &  _LC1_C23 & !_LC2_C23 & !_LC6_C23
         # !EN &  _LC6_C23;

-- Node name is '|counter60:UT2|counter10:UC0|:44' 
-- Equation name is '_LC1_C23', type is buried 
_LC1_C23 = DFFE( _EQ047, !_LC2_C21, GLOBAL( nCR),  VCC,  VCC);
  _EQ047 =  EN & !_LC1_C23
         # !EN &  _LC1_C23;

-- Node name is '|counter60:UT2|:12' 
-- Equation name is '_LC2_C23', type is buried 
!_LC2_C23 = _LC2_C23~NOT;
_LC2_C23~NOT = LCELL( _EQ048);
  _EQ048 =  _LC3_C23
         #  _LC6_C23
         # !_LC5_C23
         # !_LC1_C23;

-- Node name is ':39' 
-- Equation name is '_LC2_C21', type is buried 
!_LC2_C21 = _LC2_C21~NOT;
_LC2_C21~NOT = LCELL( _EQ049);
  _EQ049 = !Adj_Min & !_LC1_C21
         # !Adj_Min & !_LC1_B15
         # !CP & !_LC1_C21
         # !CP & !_LC1_B15
         #  Adj_Min & !CP;

-- Node name is ':64' 
-- Equation name is '_LC3_C18', type is buried 
!_LC3_C18 = _LC3_C18~NOT;
_LC3_C18~NOT = LCELL( _EQ050);
  _EQ050 = !Adj_Hour &  _LC5_C18
         # !CP &  _LC5_C18
         #  Adj_Hour & !CP;

-- Node name is '~66~1' 
-- Equation name is '~66~1', location is LC5_C18, type is buried.
-- synthesized logic cell 
_LC5_C18 = LCELL( _EQ051);
  _EQ051 = !_LC1_C18
         # !_LC2_C23
         # !_LC1_C21
         # !_LC1_B15;



Project Information                f:\workhard\workhard\workhard\top_clock.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10K' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:01
   Partitioner                            00:00:00
   Fitter                                 00:00:00
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:01


Memory Allocated
-----------------

Peak memory allocated during compilation  = 15,402K

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