⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 complete_clock.rpt

📁 数字钟 可实现正常计数校准 还有方电台报时功能 四低一高 闹钟功能
💻 RPT
📖 第 1 页 / 共 5 页
字号:
22:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
23:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
24:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
EA:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)


Device-Specific Information:  f:\workhard\workhard\workhard\complete_clock.rpt
complete_clock

** CLOCK SIGNALS **

Type     Fan-out       Name
INPUT       31         CP
LCELL        8         |top_clock:C1|:39


Device-Specific Information:  f:\workhard\workhard\workhard\complete_clock.rpt
complete_clock

** CLEAR SIGNALS **

Type     Fan-out       Name
INPUT       24         AdjMinkey


Device-Specific Information:  f:\workhard\workhard\workhard\complete_clock.rpt
complete_clock

** EQUATIONS **

AdjHrkey : INPUT;
AdjMinkey : INPUT;
CP       : INPUT;
CtrlBell : INPUT;
Mode     : INPUT;
nCR      : INPUT;
_1kHz    : INPUT;

-- Node name is 'ALARM' 
-- Equation name is 'ALARM', type is output 
ALARM    =  _LC8_B20;

-- Node name is 'LED_Hr0' 
-- Equation name is 'LED_Hr0', type is output 
LED_Hr0  =  _LC3_C21;

-- Node name is 'LED_Hr1' 
-- Equation name is 'LED_Hr1', type is output 
LED_Hr1  =  _LC1_C21;

-- Node name is 'LED_Hr2' 
-- Equation name is 'LED_Hr2', type is output 
LED_Hr2  =  _LC5_C21;

-- Node name is 'LED_Hr3' 
-- Equation name is 'LED_Hr3', type is output 
LED_Hr3  =  _LC5_C23;

-- Node name is 'LED_Hr4' 
-- Equation name is 'LED_Hr4', type is output 
LED_Hr4  =  _LC4_C21;

-- Node name is 'LED_Hr5' 
-- Equation name is 'LED_Hr5', type is output 
LED_Hr5  =  _LC3_C15;

-- Node name is 'LED_Hr6' 
-- Equation name is 'LED_Hr6', type is output 
LED_Hr6  =  _LC6_B20;

-- Node name is 'LED_Hr7' 
-- Equation name is 'LED_Hr7', type is output 
LED_Hr7  =  _LC4_B20;

-- Node name is 'LED_Min0' 
-- Equation name is 'LED_Min0', type is output 
LED_Min0 =  _LC1_B18;

-- Node name is 'LED_Min1' 
-- Equation name is 'LED_Min1', type is output 
LED_Min1 =  _LC3_B13;

-- Node name is 'LED_Min2' 
-- Equation name is 'LED_Min2', type is output 
LED_Min2 =  _LC1_B13;

-- Node name is 'LED_Min3' 
-- Equation name is 'LED_Min3', type is output 
LED_Min3 =  _LC6_C16;

-- Node name is 'LED_Min4' 
-- Equation name is 'LED_Min4', type is output 
LED_Min4 =  _LC1_B14;

-- Node name is 'LED_Min5' 
-- Equation name is 'LED_Min5', type is output 
LED_Min5 =  _LC6_B18;

-- Node name is 'LED_Min6' 
-- Equation name is 'LED_Min6', type is output 
LED_Min6 =  _LC7_B18;

-- Node name is 'LED_Min7' 
-- Equation name is 'LED_Min7', type is output 
LED_Min7 =  _LC8_B18;

-- Node name is 'LED_Sec0' 
-- Equation name is 'LED_Sec0', type is output 
LED_Sec0 =  _LC8_B1;

-- Node name is 'LED_Sec1' 
-- Equation name is 'LED_Sec1', type is output 
LED_Sec1 =  _LC6_B5;

-- Node name is 'LED_Sec2' 
-- Equation name is 'LED_Sec2', type is output 
LED_Sec2 =  _LC2_B5;

-- Node name is 'LED_Sec3' 
-- Equation name is 'LED_Sec3', type is output 
LED_Sec3 =  _LC1_B3;

-- Node name is 'LED_Sec4' 
-- Equation name is 'LED_Sec4', type is output 
LED_Sec4 =  _LC8_B19;

-- Node name is 'LED_Sec5' 
-- Equation name is 'LED_Sec5', type is output 
LED_Sec5 =  _LC2_B18;

-- Node name is 'LED_Sec6' 
-- Equation name is 'LED_Sec6', type is output 
LED_Sec6 =  _LC4_B16;

-- Node name is 'LED_Sec7' 
-- Equation name is 'LED_Sec7', type is output 
LED_Sec7 =  _LC1_B7;

-- Node name is '|Bell:C3|counter24:SU2|:58' 
-- Equation name is '_LC1_C15', type is buried 
!_LC1_C15 = _LC1_C15~NOT;
_LC1_C15~NOT = LCELL( _EQ001);
  _EQ001 = !_LC1_C17 & !_LC8_C21;

-- Node name is '|Bell:C3|counter24:SU2|~104~1' 
-- Equation name is '_LC8_C17', type is buried 
-- synthesized logic cell 
_LC8_C17 = LCELL( _EQ002);
  _EQ002 = !_LC1_C17 & !_LC4_C17 & !_LC5_C17 &  _LC6_C17;

-- Node name is '|Bell:C3|counter24:SU2|:104' 
-- Equation name is '_LC2_C15', type is buried 
!_LC2_C15 = _LC2_C15~NOT;
_LC2_C15~NOT = LCELL( _EQ003);
  _EQ003 = !_LC4_C17 & !_LC6_C15
         # !_LC4_C17 &  _LC8_C17
         # !_LC1_C15 & !_LC6_C15
         # !_LC1_C15 &  _LC8_C17;

-- Node name is '|Bell:C3|counter24:SU2|:142' 
-- Equation name is '_LC6_C17', type is buried 
_LC6_C17 = LCELL( _EQ004);
  _EQ004 = !_LC8_C21
         # !_LC7_C21;

-- Node name is '|Bell:C3|counter24:SU2|:149' 
-- Equation name is '_LC5_C15', type is buried 
_LC5_C15 = LCELL( _EQ005);
  _EQ005 =  _LC6_C15 &  _LC8_C17;

-- Node name is '|Bell:C3|counter24:SU2|:155' 
-- Equation name is '_LC3_C17', type is buried 
!_LC3_C17 = _LC3_C17~NOT;
_LC3_C17~NOT = LCELL( _EQ006);
  _EQ006 = !_LC4_C17
         #  _LC1_C17
         #  _LC8_C21
         # !_LC7_C21;

-- Node name is '|Bell:C3|counter24:SU2|~180~1' 
-- Equation name is '_LC2_C17', type is buried 
-- synthesized logic cell 
_LC2_C17 = LCELL( _EQ007);
  _EQ007 = !_LC3_C17
         #  _LC5_C15;

-- Node name is '|Bell:C3|counter24:SU2|~182~1' 
-- Equation name is '_LC7_C17', type is buried 
-- synthesized logic cell 
_LC7_C17 = LCELL( _EQ008);
  _EQ008 = !_LC2_C15 & !_LC3_C17 & !_LC5_C15;

-- Node name is '|Bell:C3|counter24:SU2|:207' 
-- Equation name is '_LC4_C17', type is buried 
_LC4_C17 = DFFE( _EQ009, GLOBAL( CP),  VCC,  VCC,  VCC);
  _EQ009 = !_LC1_C17 &  _LC4_C17 &  _LC7_C17
         #  _LC4_C17 &  _LC6_C17 &  _LC7_C17
         #  _LC1_C17 & !_LC4_C17 & !_LC6_C17 &  _LC7_C17;

-- Node name is '|Bell:C3|counter24:SU2|:208' 
-- Equation name is '_LC1_C17', type is buried 
_LC1_C17 = DFFE( _EQ010, GLOBAL( CP),  VCC,  VCC,  VCC);
  _EQ010 =  _LC1_C17 &  _LC6_C17 &  _LC7_C17
         # !_LC1_C17 & !_LC6_C17 &  _LC7_C17;

-- Node name is '|Bell:C3|counter24:SU2|:209' 
-- Equation name is '_LC8_C21', type is buried 
_LC8_C21 = DFFE( _EQ011, GLOBAL( CP),  VCC,  VCC,  VCC);
  _EQ011 = !_LC2_C15 &  _LC2_C17 & !_LC7_C21 &  _LC8_C21
         # !_LC2_C15 &  _LC2_C17 &  _LC7_C21 & !_LC8_C21;

-- Node name is '|Bell:C3|counter24:SU2|:210' 
-- Equation name is '_LC7_C21', type is buried 
_LC7_C21 = DFFE( _EQ012, GLOBAL( CP),  VCC,  VCC,  VCC);
  _EQ012 = !_LC2_C15 & !_LC7_C21;

-- Node name is '|Bell:C3|counter24:SU2|~261~1' 
-- Equation name is '_LC4_C15', type is buried 
-- synthesized logic cell 
_LC4_C15 = LCELL( _EQ013);
  _EQ013 = !_LC5_C17 &  _LC6_C15
         #  _LC3_C17 &  _LC5_C17 & !_LC6_C15
         # !_LC3_C17 &  _LC6_C15;

-- Node name is '|Bell:C3|counter24:SU2|:282' 
-- Equation name is '_LC6_C15', type is buried 
_LC6_C15 = DFFE( _EQ014, GLOBAL( CP),  VCC,  VCC,  VCC);
  _EQ014 = !_LC2_C15 &  _LC4_C15
         # !_LC2_C15 &  _LC6_C15 &  _LC8_C17;

-- Node name is '|Bell:C3|counter24:SU2|:283' 
-- Equation name is '_LC5_C17', type is buried 
_LC5_C17 = DFFE( _EQ015, GLOBAL( CP),  VCC,  VCC,  VCC);
  _EQ015 = !_LC2_C15 & !_LC3_C17 & !_LC5_C15 &  _LC5_C17
         # !_LC2_C15 &  _LC3_C17 & !_LC5_C15 & !_LC5_C17;

-- Node name is '|Bell:C3|counter60:SU1|counter6:UC1|lpm_add_sub:45|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_B14', type is buried 
_LC6_B14 = LCELL( _EQ016);
  _EQ016 =  _LC2_B14 &  _LC8_B14;

-- Node name is '|Bell:C3|counter60:SU1|counter6:UC1|lpm_add_sub:45|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC7_B14', type is buried 
_LC7_B14 = LCELL( _EQ017);
  _EQ017 =  _LC2_B14 &  _LC5_B14 &  _LC8_B14;

-- Node name is '|Bell:C3|counter60:SU1|counter6:UC1|:14' 
-- Equation name is '_LC3_B14', type is buried 
!_LC3_B14 = _LC3_B14~NOT;
_LC3_B14~NOT = LCELL( _EQ018);
  _EQ018 = !_LC5_B14
         #  _LC8_B14
         #  _LC4_B14
         # !_LC2_B14;

-- Node name is '|Bell:C3|counter60:SU1|counter6:UC1|:41' 
-- Equation name is '_LC4_B14', type is buried 
_LC4_B14 = DFFE( _EQ019, GLOBAL( CP),  VCC,  VCC,  VCC);
  _EQ019 = !_LC2_B13 &  _LC4_B14
         # !_LC3_B14 &  _LC4_B14 & !_LC7_B14
         #  _LC2_B13 & !_LC3_B14 & !_LC4_B14 &  _LC7_B14;

-- Node name is '|Bell:C3|counter60:SU1|counter6:UC1|:42' 
-- Equation name is '_LC5_B14', type is buried 
_LC5_B14 = DFFE( _EQ020, GLOBAL( CP),  VCC,  VCC,  VCC);
  _EQ020 = !_LC2_B13 &  _LC5_B14
         # !_LC3_B14 &  _LC5_B14 & !_LC6_B14
         #  _LC2_B13 & !_LC3_B14 & !_LC5_B14 &  _LC6_B14;

-- Node name is '|Bell:C3|counter60:SU1|counter6:UC1|:43' 
-- Equation name is '_LC8_B14', type is buried 
_LC8_B14 = DFFE( _EQ021, GLOBAL( CP),  VCC,  VCC,  VCC);
  _EQ021 = !_LC2_B13 &  _LC8_B14
         # !_LC2_B14 & !_LC3_B14 &  _LC8_B14
         #  _LC2_B13 &  _LC2_B14 & !_LC3_B14 & !_LC8_B14;

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -