songer.tan.rpt
来自「乐曲演奏设计电路,可演奏不同的乐曲.长时间播放音乐.」· RPT 代码 · 共 285 行 · 第 1/5 页
RPT
285 行
+---------------------------------------------+------------------------------------------+---------------+----------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+------------------------------+--------------+
+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option ; Setting ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name ; EP1C6Q240C8 ; ; ; ;
; Timing Models ; Final ; ; ; ;
; Number of source nodes to report per destination node ; 10 ; ; ; ;
; Number of destination nodes to report ; 10 ; ; ; ;
; Number of paths to report ; 200 ; ; ; ;
; Report Minimum Timing Checks ; Off ; ; ; ;
; Use Fast Timing Models ; Off ; ; ; ;
; Report IO Paths Separately ; Off ; ; ; ;
; Default hold multicycle ; Same As Multicycle ; ; ; ;
; Cut paths between unrelated clock domains ; On ; ; ; ;
; Cut off read during write signal paths ; On ; ; ; ;
; Cut off feedback from I/O pins ; On ; ; ; ;
; Report Combined Fast/Slow Timing ; Off ; ; ; ;
; Ignore Clock Settings ; Off ; ; ; ;
; Analyze latches as synchronous elements ; On ; ; ; ;
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Enable Clock Latency ; Off ; ; ; ;
; Use TimeQuest Timing Analyzer ; Off ; ; ; ;
+-------------------------------------------------------+--------------------+------+----+-------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary ;
+------------------------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+------------------------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; clk12mh ; ; User Pin ; None ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
; clk8hz ; ; User Pin ; None ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
; altera_internal_jtag~TCKUTAP ; ; User Pin ; None ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
+------------------------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk12mh' ;
+-------+------------------------------------------------+----------------------------------+----------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-------+------------------------------------------------+----------------------------------+----------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A ; 195.69 MHz ( period = 5.110 ns ) ; speakera:u3|\genspks:count11[3] ; speakera:u3|\genspks:count11[4] ; clk12mh ; clk12mh ; None ; None ; 4.647 ns ;
; N/A ; 195.69 MHz ( period = 5.110 ns ) ; speakera:u3|\genspks:count11[3] ; speakera:u3|\genspks:count11[0] ; clk12mh ; clk12mh ; None ; None ; 4.647 ns ;
; N/A ; 195.69 MHz ( period = 5.110 ns ) ; speakera:u3|\genspks:count11[3] ; speakera:u3|\genspks:count11[1] ; clk12mh ; clk12mh ; None ; None ; 4.647 ns ;
; N/A ; 195.69 MHz ( period = 5.110 ns ) ; speakera:u3|\genspks:count11[3] ; speakera:u3|\genspks:count11[2] ; clk12mh ; clk12mh ; None ; None ; 4.647 ns ;
; N/A ; 195.69 MHz ( period = 5.110 ns ) ; speakera:u3|\genspks:count11[3] ; speakera:u3|\genspks:count11[3] ; clk12mh ; clk12mh ; None ; None ; 4.647 ns ;
; N/A ; 197.39 MHz ( period = 5.066 ns ) ; speakera:u3|\genspks:count11[4] ; speakera:u3|\genspks:count11[4] ; clk12mh ; clk12mh ; None ; None ; 4.603 ns ;
; N/A ; 197.39 MHz ( period = 5.066 ns ) ; speakera:u3|\genspks:count11[4] ; speakera:u3|\genspks:count11[0] ; clk12mh ; clk12mh ; None ; None ; 4.603 ns ;
; N/A ; 197.39 MHz ( period = 5.066 ns ) ; speakera:u3|\genspks:count11[4] ; speakera:u3|\genspks:count11[1] ; clk12mh ; clk12mh ; None ; None ; 4.603 ns ;
; N/A ; 197.39 MHz ( period = 5.066 ns ) ; speakera:u3|\genspks:count11[4] ; speakera:u3|\genspks:count11[2] ; clk12mh ; clk12mh ; None ; None ; 4.603 ns ;
; N/A ; 197.39 MHz ( period = 5.066 ns ) ; speakera:u3|\genspks:count11[4] ; speakera:u3|\genspks:count11[3] ; clk12mh ; clk12mh ; None ; None ; 4.603 ns ;
; N/A ; 202.80 MHz ( period = 4.931 ns ) ; speakera:u3|\genspks:count11[0] ; speakera:u3|\genspks:count11[4] ; clk12mh ; clk12mh ; None ; None ; 4.468 ns ;
; N/A ; 202.80 MHz ( period = 4.931 ns ) ; speakera:u3|\genspks:count11[0] ; speakera:u3|\genspks:count11[0] ; clk12mh ; clk12mh ; None ; None ; 4.468 ns ;
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