songer.map.rpt

乐曲演奏设计电路,可演奏不同的乐曲.长时间播放音乐.

; Instance Index ; Instance ID ; Width ; Depth ; Mode       ; Hierarchy Location                                                                  ;
+----------------+-------------+-------+-------+------------+-------------------------------------------------------------------------------------+
; 0              ; ROM1        ; 4     ; 256   ; Read/Write ; notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated ;
+----------------+-------------+-------+-------+------------+-------------------------------------------------------------------------------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version
    Info: Processing started: Mon Nov 10 22:40:54 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off songer -c songer
Info: Found 2 design units, including 1 entities, in source file music.vhd
    Info: Found design unit 1: music-SYN
    Info: Found entity 1: MUSIC
Info: Found 2 design units, including 1 entities, in source file notetbs.vhd
    Info: Found design unit 1: notetabs-one
    Info: Found entity 1: notetabs
Info: Found 2 design units, including 1 entities, in source file songer.vhd
    Info: Found design unit 1: songer-one
    Info: Found entity 1: songer
Info: Found 2 design units, including 1 entities, in source file speakera.vhd
    Info: Found design unit 1: speakera-one
    Info: Found entity 1: speakera
Info: Found 2 design units, including 1 entities, in source file tonetaba.vhd
    Info: Found design unit 1: tonetaba-one
    Info: Found entity 1: tonetaba
Info: Elaborating entity "songer" for the top level hierarchy
Info: Elaborating entity "notetabs" for hierarchy "notetabs:u1"
Info: Elaborating entity "MUSIC" for hierarchy "notetabs:u1|MUSIC:u1"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/altsyncram.tdf
    Info: Found entity 1: altsyncram
Info: Elaborating entity "altsyncram" for hierarchy "notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component"
Info: Elaborated megafunction instantiation "notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_el51.tdf
    Info: Found entity 1: altsyncram_el51
Info: Elaborating entity "altsyncram_el51" for hierarchy "notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_ldj2.tdf
    Info: Found entity 1: altsyncram_ldj2
Info: Elaborating entity "altsyncram_ldj2" for hierarchy "notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|altsyncram_ldj2:altsyncram1"
Info: Found 3 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/sld_mod_ram_rom.vhd
    Info: Found design unit 1: sld_mod_ram_rom_pack
    Info: Found design unit 2: sld_mod_ram_rom-rtl
    Info: Found entity 1: sld_mod_ram_rom
Info: Elaborating entity "sld_mod_ram_rom" for hierarchy "notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|sld_mod_ram_rom:mgl_prim2"
Info: Elaborated megafunction instantiation "notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|sld_mod_ram_rom:mgl_prim2"
Info: Found 2 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/sld_rom_sr.vhd
    Info: Found design unit 1: sld_rom_sr-INFO_REG
    Info: Found entity 1: sld_rom_sr
Info: Elaborating entity "sld_rom_sr" for hierarchy "notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr"
Info: Elaborated megafunction instantiation "notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr", which is child of megafunction instantiation "notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|sld_mod_ram_rom:mgl_prim2"
Info: Instantiated megafunction "notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|sld_mod_ram_rom:mgl_prim2" with the following parameter:
    Info: Parameter "CVALUE" = "0000"
    Info: Parameter "IS_DATA_IN_RAM" = "1"
    Info: Parameter "IS_READABLE" = "1"
    Info: Parameter "NODE_NAME" = "1380928817"
    Info: Parameter "NUMWORDS" = "256"
    Info: Parameter "SHIFT_COUNT_BITS" = "3"
    Info: Parameter "WIDTH_WORD" = "4"
    Info: Parameter "WIDTHAD" = "8"
Info: Elaborating entity "tonetaba" for hierarchy "tonetaba:u2"
Warning (10631): VHDL Process Statement warning at tonetaba.vhd(11): inferring latch(es) for signal or variable "tone", which holds its previous value in one or more paths through the process
Warning (10631): VHDL Process Statement warning at tonetaba.vhd(11): inferring latch(es) for signal or variable "code", which holds its previous value in one or more paths through the process
Warning (10631): VHDL Process Statement warning at tonetaba.vhd(11): inferring latch(es) for signal or variable "high", which holds its previous value in one or more paths through the process
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "high"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "code[0]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "code[1]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "code[2]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "code[3]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "tone[0]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "tone[1]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "tone[2]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "tone[3]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "tone[4]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "tone[5]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "tone[6]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "tone[7]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "tone[8]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "tone[9]"
Info (10041): Verilog HDL or VHDL info at tonetaba.vhd(11): inferred latch for "tone[10]"
Info: Elaborating entity "speakera" for hierarchy "speakera:u3"
Info: Found 6 design units, including 2 entities, in source file c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd
    Info: Found design unit 1: HUB_PACK
    Info: Found design unit 2: JTAG_PACK
    Info: Found design unit 3: sld_hub-rtl
    Info: Found design unit 4: sld_jtag_state_machine-rtl
    Info: Found entity 1: sld_hub
    Info: Found entity 2: sld_jtag_state_machine
Info: Elaborated megafunction instantiation "sld_hub:sld_hub_inst"
Info: Elaborated megafunction instantiation "sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine", which is child of megafunction instantiation "sld_hub:sld_hub_inst"
Info: Instantiated megafunction "sld_hub:sld_hub_inst" with the following parameter:
    Info: Parameter "SLD_HUB_IP_VERSION" = "1"
    Info: Parameter "SLD_HUB_IP_MINOR_VERSION" = "3"
    Info: Parameter "SLD_COMMON_IP_VERSION" = "0"
    Info: Parameter "N_NODES" = "1"
    Info: Parameter "N_SEL_BITS" = "1"
    Info: Parameter "N_NODE_IR_BITS" = "5"
    Info: Parameter "NODE_INFO" = "00001000000110000110111000000000"
    Info: Parameter "COMPILATION_MODE" = "0"
    Info: Parameter "DEVICE_FAMILY" = "Cyclone"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/lpm_shiftreg.tdf
    Info: Found entity 1: lpm_shiftreg
Info: Elaborated megafunction instantiation "sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register", which is child of megafunction instantiation "sld_hub:sld_hub_inst"
Info: Instantiated megafunction "sld_hub:sld_hub_inst" with the following parameter:
    Info: Parameter "SLD_HUB_IP_VERSION" = "1"
    Info: Parameter "SLD_HUB_IP_MINOR_VERSION" = "3"
    Info: Parameter "SLD_COMMON_IP_VERSION" = "0"
    Info: Parameter "N_NODES" = "1"
    Info: Parameter "N_SEL_BITS" = "1"
    Info: Parameter "N_NODE_IR_BITS" = "5"
    Info: Parameter "NODE_INFO" = "00001000000110000110111000000000"
    Info: Parameter "COMPILATION_MODE" = "0"
    Info: Parameter "DEVICE_FAMILY" = "Cyclone"