songer.map.rpt

乐曲演奏设计电路,可演奏不同的乐曲.长时间播放音乐.

; Name                                                                                                                       ; Type ; Mode           ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF       ;
+----------------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+------+-----------+
; notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|altsyncram_ldj2:altsyncram1|ALTSYNCRAM ; AUTO ; True Dual Port ; 256          ; 4            ; 256          ; 4            ; 1024 ; music.mif ;
+----------------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+------+-----------+


+----------------------------------------------------------------------------------------------------+
; User-Specified and Inferred Latches                                                                ;
+-----------------------------------------------------+---------------------+------------------------+
; Latch Name                                          ; Latch Enable Signal ; Free of Timing Hazards ;
+-----------------------------------------------------+---------------------+------------------------+
; tonetaba:u2|code[0]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|code[1]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|code[2]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|high                                    ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|tone[0]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|tone[1]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|tone[2]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|tone[3]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|tone[4]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|tone[5]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|tone[6]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|tone[7]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|tone[8]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|tone[9]                                 ; tonetaba:u2|Mux4    ; yes                    ;
; tonetaba:u2|tone[10]                                ; tonetaba:u2|Mux4    ; yes                    ;
; Number of user-specified and inferred latches = 15  ;                     ;                        ;
+-----------------------------------------------------+---------------------+------------------------+
Note: All latches listed above may not be present at the end of synthesis due to various synthesis optimizations.


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 125   ;
; Number of registers using Synchronous Clear  ; 21    ;
; Number of registers using Synchronous Load   ; 19    ;
; Number of registers using Asynchronous Clear ; 67    ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 60    ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+--------------------------------------------------+
; Inverted Register Statistics                     ;
+----------------------------------------+---------+
; Inverted Register                      ; Fan out ;
+----------------------------------------+---------+
; sld_hub:sld_hub_inst|hub_tdo           ; 2       ;
; Total number of inverted registers = 1 ;         ;
+----------------------------------------+---------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                                                                                                                                                                                         ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output                                                                                                                                                               ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |songer|sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[2]                                                                                                                                         ;
; 5:1                ; 5 bits    ; 15 LEs        ; 5 LEs                ; 10 LEs                 ; Yes        ; |songer|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[1]                                                                                                                     ;
; 20:1               ; 4 bits    ; 52 LEs        ; 32 LEs               ; 20 LEs                 ; Yes        ; |songer|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]                                                                                                                          ;
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |songer|notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                ;
; 5:1                ; 5 bits    ; 15 LEs        ; 5 LEs                ; 10 LEs                 ; Yes        ; |songer|notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0] ;
; 24:1               ; 4 bits    ; 64 LEs        ; 52 LEs               ; 12 LEs                 ; Yes        ; |songer|notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0]      ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|altsyncram_ldj2:altsyncram1 ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                       ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                        ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for notetabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_el51:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr ;
+----------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment           ; Value ; From ; To                                                                                                                                                ;
+----------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_ROM_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                 ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[0]                                                                                                                                   ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[1]                                                                                                                                   ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[2]                                                                                                                                   ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[3]                                                                                                                                   ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[4]                                                                                                                                   ;
+----------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------+
; Source assignments for sld_hub:sld_hub_inst              ;
+------------------------------+-------+------+------------+
; Assignment                   ; Value ; From ; To         ;
+------------------------------+-------+------+------------+
; IGNORE_LCELL_BUFFERS         ; OFF   ; -    ; -          ;
; REMOVE_REDUNDANT_LOGIC_CELLS ; OFF   ; -    ; -          ;
; NOT_GATE_PUSH_BACK           ; OFF   ; -    ; CLR_SIGNAL ;
; POWER_UP_LEVEL               ; LOW   ; -    ; CLR_SIGNAL ;
+------------------------------+-------+------+------------+


+---------------------------------------------------------------------------------------+
; Source assignments for sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine ;
+----------------+-------+------+-------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                    ;
+----------------+-------+------+-------------------------------------------------------+
; POWER_UP_LEVEL ; Low   ; -    ; state[0]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[1]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[2]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[3]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[4]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[5]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[6]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[7]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[8]                                              ;