📄 adc_idle_wakeup_int.dt
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;*****************************************************************************
;Function : MCU in idle mode, use the interrupt mode, and realizing complete conversion to ;awaken ADE3 MCU
;*****************************************************************************
;AD converter steps to set up :
;1.Set ADE11-ADE0 bit in ADICH and ADICL register.enabling analog input channel
;2. Set ADCR register and select ADC reference voltage
;3.Set ADIS3:ADIS0 bit in ADCR register,chose ad input channel ,set ADCKR1-ADCKR0
;bit in ADCR register pre - ADC clock frequency; AD home ADPD=1 began
; May need to enable ADC and total suspended
; 4. According to the need for the calibration channel ADC;
;5. If the need to resort to interrupt function, which set TEST ADIE=1; implementation ENI ;orders;
;6. ADRUN=1 home ADCR which began AD converter;
;7. wait for the interruption or ADRUN was purged 0; If AD interruption, money ADIF.
;8. Preservation conversion results. If so many AD converter, proceed to step 6
;*****************************************************************************
ADC_LOW == 0X14
ADC_HIGH == 0X15
;
INCLUDE "EM78P510.INC"
;
ORG 0X0000
JMP RESET
;
ORG 0X0012
JMP ADC_INT
ADC_INT:
BANK 0
BC ISR, ADIF
BANK 3
MOV A, RD ;
BANK 0
AND A, @0X0F
MOV ADC_LOW,A
BANK 3
SWAPA RC
BANK 0
MOV ADC_HIGH, A
AND A, @0X0F0
OR ADC_LOW, A
MOV A, @0X0F
AND ADC_HIGH, A
RETI
RESET:
DISI
CALL SUB_RINIT
CALL SUB_ADJ
BS IMR, ADIE
BC ISR, ADIF
ENI
IDLE_SLEP_SET:
BANK 3
MOV A, @0X83 ;selet ADE3,set ADRUN=1
OR ADCR, A
BANK 0 ;power on ,IDLE model
SLEP ;enter into IDLE+SLEEP model
NOP
AD_WAKED_UP:
NOP
NOP
NOP
JMP $
;
SUB_ADJ:
BANK 3
BS ADICH, CALI ;enable AD calibration
_ADJ_LOOP:
BS ADCR, ADRUN
JBC ADCR, ADRUN
JMP $-1
MOV A, ADDL
AND A, @0X0F
JBS R3, Z
JMP _ADJ_DONE
MOV A, ADDH
JBS R3, Z
JMP _ADJ_DONE
MOV A, @0X10
ADD ADDL, A
JMP _ADJ_LOOP
_ADJ_DONE:
BC ADICH, CALI
BANK 0
RET
;
SUB_RINIT:
BANK 3
MOV A, @0X0F
MOV ADICL, A ;select ADE0~ ADE3 analog input
CLR ADICH ;set VREFS==VDD
MOV A, @0X60
MOV ADCR, A ;selet ADE0,set ADCKR1/ADCKR0=1:0,ADP=1
BS EIESL, ADWK ;enable AD wake up funtion
BANK 0
CLR ADC_LOW
CLR ADC_HIGH
RET
;
END
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