adc_req.dt

台弯义隆芯片AD采样设计控制实例说明Application of ADC in EM。

;*****************************************************************************
;Function : inquiry, sampling ADE3 
;*****************************************************************************
;AD converter steps to set up :
; 1. set  ADE11-ADE0 ADICL in ADICH , enabling analog input channels
; 2. Register set up ADICH choice ADC reference voltage; 
; 3. Register set up the ADCR ADIS3:ADIS0 choose AD input channels
; Register set up the ADCKR1-ADCKR0 ADCR, chose to pre - ADC clock frequency
; AD home ADPD=1 began sampling. 
; 4. May need to enable ADC and total suspended 
; 5. According to the need for the calibration channel ADC
; 6. If the need to resort to interrupt function, which set TEST ADIE=1
; implementation ENI orders
; 7. ADRUN=1 home ADCR which began AD converter
; 8. wait for the interruption or ADRUN was purged 0; If AD interruption, money ADIF. 
; 9. Preservation conversion results. If so many AD converter, proceed to step 6 
;*****************************************************************************
ADC_LOW    == 0X10                        
ADC_HIGH   == 0X11
;     
           INCLUDE   "EM78P510.INC"
           ;
           ORG       0X0000
           JMP       RESET
           ;
RESET:
           DISI
           CALL      SUB_RINIT
           CALL      SUB_ADJ
           ;
MAIN:
           BANK      3
           MOV       A, @0X83              ;SELECT ADE3           
           OR        ADCR, A
           CALL      SUB_ADC
           NOP
           NOP
           JMP       MAIN
           ;           
SUB_ADJ:
           BANK     3
           BS       ADICH, CALI             ;ENABLE CALIBRATION
_ADJ_LOOP:           
           BS       ADCR, ADRUN
           JBC      ADCR, ADRUN
           JMP      $-1
           MOV      A, ADDL
           AND      A, @0X0F
           JBS      R3, Z
           JMP      _ADJ_DONE
           MOV      A, ADDH
           JBS      R3, Z
           JMP      _ADJ_DONE
           MOV      A, @0X10
           ADD      ADDL, A
           JMP      _ADJ_LOOP           
_ADJ_DONE:
           BC       ADICH, CALI
           BANK     0
           RET
           ;
SUB_RINIT:
           BANK      3
           MOV       A, @0X0F
           MOV       ADICL, A              ;SELECT ADE0~ ADE3 AS ANALOG INPUT
           CLR       ADICH                 ;VREFS==VDD
           MOV       A, @0X60
           MOV       ADCR, A               ;SELECT  AD0,SELECT ADCKR1/ADCKR0=1:0,ADP=1
           BANK      0
           CLR       ADC_LOW
           CLR       ADC_HIGH
           RET           
           ;
SUB_ADC:
           BS        ADCR, ADRUN
           JBC       ADCR, ADRUN
           JMP       $-1
           MOV       A, ADDL                 ;
           BANK      0
           AND       A, @0X0F
           MOV       ADC_LOW,A
           BANK      3
           SWAPA     ADDH
           BANK      0
           MOV       ADC_HIGH, A
           AND       A, @0X0F0
           OR        ADC_LOW, A
           MOV       A, @0X0F
           AND       ADC_HIGH, A           
           RET
           ;         
           END