adc_idle_wakeup_req.dt

台弯义隆芯片AD采样设计控制实例说明Application of ADC in EM。

;******************************************************************************
;Function : MCU in IDLE mode sleep time, the use of inquiry, to achieve complete conversion ;to awaken ADE3 MCU 
;******************************************************************************
; AD conversion steps to set up :
; 1. Register ADICH right and the ADE11-ADE0 ADICL for setup, enabling analog input ;channels, 
;2.  set up ADICH  register choice ADC reference voltage; 
; 3. set up ADIS3:ADIS0 in ADICH, choose AD input channels
; set up the ADCKR1-ADCKR0 in ADCR, chose to pre - ADC clock frequency
; AD home ADPD=1 began sampling. 
;3. May need to enable ADC and total suspended 
;4. According to the need for the calibration channel ADC
; 5. If the need to resort to interrupt function, which set TEST ADIE=1
; implementation ENI orders
;6. ADRUN=1 home ADCR which began AD converter
; 7. wait for the interruption or ADRUN was purged 0; If AD interruption, money ADIF. 
;8. Preservation conversion results. If so many AD converter, proceed to step 6 
;******************************************************************************
ADC_LOW    == 0X10                        
ADC_HIGH   == 0X11
;     
           INCLUDE   "EM78P510.INC"
           ;
           ORG       0X0000
           JMP       RESET
           ;
RESET:
           DISI
           CALL      SUB_RINIT
           CALL      SUB_ADJ
           ;
IDLE_SLEP_SET:
           BANK      3
           MOV       A, @0X83             ;selet ADE3           
           OR        ADCR, A         
           BANK      0     
           SLEP                           ;enter into IDLE+SLEP model           
           NOP
           BANK      3
           JBC       ADCR, ADRUN          ; Detect AD awaken 
           JMP       IDLE_SLEP_SET         ;
AD_WAKE_UP:           
           MOV       A, ADDL              ;
           BANK      0
           AND       A, @0X0F
           MOV       ADC_LOW,A
           BANK      3
           SWAPA     ADDH
           BANK      0
           MOV       ADC_HIGH, A
           AND       A, @0X0F0
           OR        ADC_LOW, A
           MOV       A, @0X0F
           AND       ADC_HIGH, A           
                      
           JMP       $
           ;           
SUB_ADJ:
           BANK     3
           BS       ADICH, CALI             ;enable AD calibration
_ADJ_LOOP:           
           BS       ADCR, ADRUN
           JBC      ADCR, ADRUN
           JMP      $-1
           MOV      A, ADDL
           AND      A, @0X0F
           JBS      R3, Z
           JMP      _ADJ_DONE
           MOV      A, ADDH
           JBS      R3, Z
           JMP      _ADJ_DONE
           MOV      A, @0X10
           ADD      ADDL, A
           JMP      _ADJ_LOOP           
_ADJ_DONE:
           BC       ADICH, CALI
           BANK     0
           RET
           ;
SUB_RINIT:
           BANK      3
           MOV       A, @0X0F
           MOV       ADICL, A              ;set  ADE0~ ADE3 Analog  input 
           CLR       ADICH                 ;sert VREFS==VDD
           MOV       A, @0X60
           MOV       ADCR, A               ;selet ADE0,set ADCKR1/ADCKR0=1:0,ADP=1
           BS        EIESL, ADWK           ;enable AD wake up function             
           BANK      0
           CLR       ADC_LOW
           CLR       ADC_HIGH
           RET           
           ;
           END