📄 binary_to_gray.vhd
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-- Company:
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-- Description:
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--
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity binary_to_gray is
port(
binary_code: in std_logic_vector(3 downto 0);
gray_code: out std_logic_vector(3 downto 0));
end entity;
architecture behavior of binary_to_gray is
signal code: std_logic_vector(3 downto 0);
begin
process(binary_code)
begin
code(3) <= binary_code(3);
code(2) <= binary_code(2) xor binary_code(3);
code(1) <= binary_code(1) xor binary_code(2);
code(0) <= binary_code(0) xor binary_code(1);
end process;
gray_code <= code;
end architecture;
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