jtdkz.vhd

来自「这是交通灯控制器的设计系统,里面有文字说明以及详细的图形,希望大家喜欢」· VHDL 代码 · 共 27 行

library ieee;
use ieee.std_logic_1164.all;

entity jtdkz is
  port (agt1,clk1,sm1,sb1: in bit;
        mr1,my1,mg1,br1,by1,bg1:out bit;
        numo1,numo2:out integer range 0 to 9;
        rst1:in std_logic);
end entity jtdkz;
architecture bhv of jtdkz is
component ztj
port (agt,clk,sm,sb: in bit;
      mr,my,mg,br,by,bg:out bit;
      numo:out integer range 0 to 99;
      rst: in std_logic);
end component;
component fenwei
port
(numin:in integer range 0 to 99;
 numa,numb:out integer range 0 to 9;
rst: in std_logic);
end component;
signal d:integer range 0 to 99;
begin
u1:ztj port map(agt=>agt1,clk=>clk1,sm=>sm1,sb=>sb1,mr=>mr1,my=>my1,mg=>mg1,br=>br1,by=>by1,bg=>bg1,numo=>d,rst=>rst1);
u2:fenwei port map(numin=>d,numa=>numo1,numb=>numo2,rst=>rst1);
end architecture bhv;