jtdkz.map.rpt

这是交通灯控制器的设计系统,里面有文字说明以及详细的图形,希望大家喜欢

; State Machine - |jtdkz|ztj:u1|state             ;
+---------+---------+---------+---------+---------+
; Name    ; state.d ; state.c ; state.b ; state.a ;
+---------+---------+---------+---------+---------+
; state.a ; 0       ; 0       ; 0       ; 0       ;
; state.b ; 0       ; 0       ; 1       ; 1       ;
; state.c ; 0       ; 1       ; 0       ; 1       ;
; state.d ; 1       ; 0       ; 0       ; 1       ;
+---------+---------+---------+---------+---------+


+--------------------------------------------------------------------------------+
; Registers Removed During Synthesis                                             ;
+---------------------------------------+----------------------------------------+
; Register name                         ; Reason for Removal                     ;
+---------------------------------------+----------------------------------------+
; u1/numo[6]                            ; Stuck at GND due to stuck port data_in ;
; u1/\cnt:clr                           ; Merged with u1/\cnt:en                 ;
; Total Number of Removed Registers = 2 ;                                        ;
+---------------------------------------+----------------------------------------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 23    ;
; Number of registers using Synchronous Clear  ; 0     ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 16    ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 13    ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+--------------------------------------------------+
; Inverted Register Statistics                     ;
+----------------------------------------+---------+
; Inverted Register                      ; Fan out ;
+----------------------------------------+---------+
; ztj:u1|mr                              ; 1       ;
; ztj:u1|br                              ; 1       ;
; Total number of inverted registers = 2 ;         ;
+----------------------------------------+---------+


+--------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: ztj:u1|lpm_add_sub:Add0 ;
+------------------------+-------------+-----------------------------------+
; Parameter Name         ; Value       ; Type                              ;
+------------------------+-------------+-----------------------------------+
; LPM_WIDTH              ; 6           ; Untyped                           ;
; LPM_REPRESENTATION     ; UNSIGNED    ; Untyped                           ;
; LPM_DIRECTION          ; ADD         ; Untyped                           ;
; ONE_INPUT_IS_CONSTANT  ; NO          ; Untyped                           ;
; LPM_PIPELINE           ; 0           ; Untyped                           ;
; MAXIMIZE_SPEED         ; 5           ; Untyped                           ;
; REGISTERED_AT_END      ; 0           ; Untyped                           ;
; OPTIMIZE_FOR_SPEED     ; 1           ; Untyped                           ;
; USE_CS_BUFFERS         ; 1           ; Untyped                           ;
; CARRY_CHAIN            ; MANUAL      ; Untyped                           ;
; CARRY_CHAIN_LENGTH     ; 48          ; CARRY_CHAIN_LENGTH                ;
; DEVICE_FAMILY          ; ACEX1K      ; Untyped                           ;
; USE_WYS                ; OFF         ; Untyped                           ;
; STYLE                  ; FAST        ; Untyped                           ;
; CBXI_PARAMETER         ; add_sub_2ih ; Untyped                           ;
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                        ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                      ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                      ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                    ;
+------------------------+-------------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Sun Jul 15 17:51:10 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off jtdkz -c jtdkz
Info: Found 2 design units, including 1 entities, in source file jtdkz.vhd
    Info: Found design unit 1: jtdkz-bhv
    Info: Found entity 1: jtdkz
Info: Found 2 design units, including 1 entities, in source file ztj.vhd
    Info: Found design unit 1: ztj-one
    Info: Found entity 1: ztj
Info: Found 2 design units, including 1 entities, in source file ../traffic/traffic.vhd
    Info: Found design unit 1: traffic-traffic_arch
    Info: Found entity 1: traffic
Info: Elaborating entity "jtdkz" for the top level hierarchy
Info: Elaborating entity "ztj" for hierarchy "ztj:u1"
Warning (10492): VHDL Process Statement warning at ztj.vhd(17): signal "rst" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at ztj.vhd(18): signal "agt" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning: Using design file fenwei.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: fenwei-fen
    Info: Found entity 1: fenwei
Info: Elaborating entity "fenwei" for hierarchy "fenwei:u2"
Warning (10492): VHDL Process Statement warning at fenwei.vhd(15): signal "rst" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning: Reduced register "ztj:u1|numo[6]" with stuck data_in port to stuck value GND
Info: Found 1 design units, including 1 entities, in source file g:/quartus/quartus/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Elaborated megafunction instantiation "ztj:u1|lpm_add_sub:Add0"
Info: Found 1 design units, including 1 entities, in source file g:/quartus/quartus/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Elaborated megafunction instantiation "ztj:u1|lpm_add_sub:Add0|addcore:adder", which is child of megafunction instantiation "ztj:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ztj:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "6"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Found 1 design units, including 1 entities, in source file g:/quartus/quartus/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Elaborated megafunction instantiation "ztj:u1|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:oflow_node", which is child of megafunction instantiation "ztj:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ztj:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "6"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "ztj:u1|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node", which is child of megafunction instantiation "ztj:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ztj:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "6"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Found 1 design units, including 1 entities, in source file g:/quartus/quartus/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Info: Elaborated megafunction instantiation "ztj:u1|lpm_add_sub:Add0|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "ztj:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ztj:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "6"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "ztj:u1|lpm_add_sub:Add0|altshift:carry_ext_latency_ffs", which is child of megafunction instantiation "ztj:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ztj:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "6"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Duplicate registers merged to single register
    Info: Duplicate register "ztj:u1|\cnt:clr" merged to single register "ztj:u1|\cnt:en"
Info: State machine "|jtdkz|ztj:u1|state" contains 4 states
Info: Selected Auto state machine encoding method for state machine "|jtdkz|ztj:u1|state"
Info: Encoding result for state machine "|jtdkz|ztj:u1|state"
    Info: Completed encoding using 4 state bits
        Info: Encoded state bit "ztj:u1|state.d"
        Info: Encoded state bit "ztj:u1|state.c"
        Info: Encoded state bit "ztj:u1|state.b"
        Info: Encoded state bit "ztj:u1|state.a"
    Info: State "|jtdkz|ztj:u1|state.a" uses code string "0000"
    Info: State "|jtdkz|ztj:u1|state.b" uses code string "0011"
    Info: State "|jtdkz|ztj:u1|state.c" uses code string "0101"
    Info: State "|jtdkz|ztj:u1|state.d" uses code string "1001"
Warning: Output pins are stuck at VCC or GND
    Warning: Pin "numo1[3]" stuck at GND
Info: Registers with preset signals will power-up high
Info: Implemented 91 device resources after synthesis - the final resource count might be different
    Info: Implemented 5 input pins
    Info: Implemented 14 output pins
    Info: Implemented 72 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 7 warnings
    Info: Allocated 135 megabytes of memory during processing
    Info: Processing ended: Sun Jul 15 17:51:12 2007
    Info: Elapsed time: 00:00:02