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m255odD:\Projects\altera\lpcores\sdr\release\VHDL\V1_0\simulationEaltcamDP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w960250541FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/APEX20KE_MF.VHDl0L72VdKmiGOU]_BA`RXnVLY9?B2OP;C;5.3d;14o-work workAbehaveDP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90DE work altcam dKmiGOU]_BA`RXnVLY9?B2l399L351VOPc]`dlI5n^0RJBA`a_[50OP;C;5.3d;14M4 ieee std_logic_1164M3 ieee std_logic_arithM2 std textioM1 ieee std_logic_unsignedo-work workEaltclklockDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w960250541FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/APEX20KE_MF.VHDl0L786V9Q4_anCk?XNjbnlm1HYgQ3OP;C;5.3d;14o-work workAbehaviorDE work altclklock 9Q4_anCk?XNjbnlm1HYgQ3l824L810Vb[M`:DhXc<>fO>6=F2bD90OP;C;5.3d;14M1 ieee std_logic_1164o-work workEaltlvds_rxDP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w960250541FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/APEX20KE_MF.VHDl0L926VSGRFYJ0MH4<Pm<d_VndJo2OP;C;5.3d;14o-work workAbehaviorDE work altclklock 9Q4_anCk?XNjbnlm1HYgQ3DE work altlvds_rx SGRFYJ0MH4<Pm<d_VndJo2l971L942V9@N6]54WGOLkHQ::PBKEl1OP;C;5.3d;14M2 ieee std_logic_1164M1 ieee std_logic_aritho-work workEaltlvds_txDP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w960250541FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/APEX20KE_MF.VHDl0L1090Ve@e0Cm]]m]@>_JFcCjWCd3OP;C;5.3d;14o-work workAbehaviorDE work altclklock 9Q4_anCk?XNjbnlm1HYgQ3DE work altlvds_tx e@e0Cm]]m]@>_JFcCjWCd3l1134L1107VER?B]mLBI=IjDFgEVB7]N0OP;C;5.3d;14M2 ieee std_logic_1164M1 ieee std_logic_aritho-work workEcommandDP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w960313882FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/Command.vhdl0L35VUDJ>1Mf6Q2K:dR6F4zM4M3OP;C;5.3d;14o-work workArtlDE work command UDJ>1Mf6Q2K:dR6F4zM4M3l114L82VfN`zSlg[fhDP<S70[8:Rl1OP;C;5.3d;14M2 ieee std_logic_1164M1 ieee std_logic_aritho-work workEcontrol_interfaceDP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w960320333FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/control_interface.vhdl0L37VlRk4mmS8DE8GgZ<]OjQbe2OP;C;5.3d;14o-work workArtlDE work control_interface lRk4mmS8DE8GgZ<]OjQbe2l86L70VIaV^o42HDVTRHfIz=`:XR3OP;C;5.3d;14M2 ieee std_logic_1164M1 ieee std_logic_aritho-work workPio_utilsDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DP std textio K]Z^fghZ6B=BjnK5NomDT3w884983840FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/io_utils.vhdl0L5VP<lZACzK6P[Mfe9Y3K02H3OP;C;5.3d;14b1M2 std textioM1 ieee std_logic_1164o-work workBbodyDB work io_utils P<lZACzK6P[Mfe9Y3K02H3l0L5VP<lZACzK6P[Mfe9Y3K02H3OP;C;5.3d;14M2 std textioM1 ieee std_logic_1164o-work worknbodyEmt48lc8m16a2DP work mti_pkg J=DJ=42UzKFGYTB5:aB]L0DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w960192142FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/mt48lc8m16a2.vhdl0L45V<oA:QAaXQP8jl:1J0[IhC2OP;C;5.3d;14o-work workAbehaveDE work mt48lc8m16a2 <oA:QAaXQP8jl:1J0[IhC2l111L86V55>9hDNOEZ`J^`i5c:eg71OP;C;5.3d;14M2 ieee std_logic_1164M1 work mti_pkgo-work workPmti_pkgDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w902791926FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/mti_pkg.vhdl0L14VJ=DJ=42UzKFGYTB5:aB]L0OP;C;5.3d;14b1M1 ieee std_logic_1164o-work workBbodyDB work mti_pkg J=DJ=42UzKFGYTB5:aB]L0l0L14VJ=DJ=42UzKFGYTB5:aB]L0OP;C;5.3d;14M1 ieee std_logic_1164o-work worknbodyEpll1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w960250685FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/pll1.vhdl0L41VBeXGXdE>[YXZUQP06KSn]2OP;C;5.3d;14o-work workAsynDE work altclklock 9Q4_anCk?XNjbnlm1HYgQ3DE work pll1 BeXGXdE>[YXZUQP06KSn]2l77L51VklIJ8Og?S8g^;2>S<5K@M0OP;C;5.3d;14M1 ieee std_logic_1164o-work workEsdr_data_pathDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w960318722FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/sdr_data_path.vhdl0L34VI[5^_fY:i^FBe50lVG8l^2OP;C;5.3d;14o-work workArtlDE work sdr_data_path I[5^_fY:i^FBe50lVG8l^2l62L53Vlj_lk5?U[7hV>5AK=cL=R0OP;C;5.3d;14M1 ieee std_logic_1164o-work workEsdr_sdramDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w960318715FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/sdr_sdram.vhdl0L35VV?Y7R2CGTa>UF7jF1NcV:3OP;C;5.3d;14o-work workArtlDP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DE work pll1 BeXGXdE>[YXZUQP06KSn]2DE work sdr_data_path I[5^_fY:i^FBe50lVG8l^2DE work command UDJ>1Mf6Q2K:dR6F4zM4M3DE work control_interface lRk4mmS8DE8GgZ<]OjQbe2DE work sdr_sdram V?Y7R2CGTa>UF7jF1NcV:3l212L73V3PKDJ<2VLZe2V[AA?950O0OP;C;5.3d;14M2 ieee std_logic_1164M1 ieee std_logic_aritho-work workEsdr_sdram_tbDP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90DP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w960311643FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/sdr_sdram_tb.vhdl0L39Vdkf`aHV61Mldf5GJQ]8=X2OP;C;5.3d;1431o-work worktExplicit TArtlDP work mti_pkg J=DJ=42UzKFGYTB5:aB]L0DE work mt48lc8m16a2 <oA:QAaXQP8jl:1J0[IhC2DE work sdr_sdram V?Y7R2CGTa>UF7jF1NcV:3DE work sdr_sdram_tb dkf`aHV61Mldf5GJQ]8=X2l489L52VnJ4:05ei1;ZV;jcAg_@7^0OP;C;5.3d;1431M4 ieee std_logic_1164M3 ieee std_logic_arithM2 ieee std_logic_unsignedM1 work mti_pkgo-work worktExplicit TPstd_logic_arithDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w884983840FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/stdlogar.vhdl0L21V=B<D>L6Jni><azGd7XE@`3OP;C;5.3d;14b1M1 ieee std_logic_1164o-work workBbodyDB work std_logic_arith =B<D>L6Jni><azGd7XE@`3l0L21V=B<D>L6Jni><azGd7XE@`3OP;C;5.3d;14M1 ieee std_logic_1164o-work worknbodyPutil_1164DP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w884983840FD:/Projects/altera/lpcores/sdr/release/VHDL/V1_0/simulation/util1164.vhdl0L5V51Nz=N2V06G@AimK]f_460OP;C;5.3d;14b1M2 ieee std_logic_1164M1 std textioo-work workBbodyDB work util_1164 51Nz=N2V06G@AimK]f_460l0L5V51Nz=N2V06G@AimK]f_460OP;C;5.3d;14M2 ieee std_logic_1164M1 std textioo-work worknbody⌨️ 快捷键说明
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