mt48lc8m16a2.vhd

基于VHDL编写的SDR-SDRAM控制器的编程

                                END IF;

                            -- Write Command
                            ELSIF Write_enable = '1' THEN
                                IF Addr(10) = '1' THEN
                                    Command(0) := WRITE_A;
                                ELSE
                                    Command(0) := WRITE;
                                END IF;
                                Col_addr (0) := TO_BITVECTOR (Addr(col_bits - 1 DOWNTO 0));
                                Bank_addr (0) := TO_BITVECTOR (Ba);

                                -- Write intterupt a Write (terminate Write immediately)
                                IF Data_in_enable = '1' THEN
                                    Data_in_enable := '0';
                                    IF Auto_precharge(TO_INTEGER(Bank)) = '1' AND Write_precharge(TO_INTEGER(Bank)) = '1' THEN
                                        RW_interrupt_write(TO_INTEGER(Bank)) := '1';
                                    END IF;
                                END IF;

                                -- Write interrupt a Read (terminate Read immediately)
                                IF Data_out_enable = '1' THEN
                                    Data_out_enable := '0';
                                    IF Auto_precharge(TO_INTEGER(Bank)) = '1' AND Read_precharge(TO_INTEGER(Bank)) = '1' THEN
                                        RW_interrupt_read(TO_INTEGER(Bank)) := '1';
                                    END IF;
                                END IF;
                            END IF;

                            -- Read or Write with Auto Precharge
                            IF Addr(10) = '1' THEN
                                Auto_precharge (TO_INTEGER(Ba)) := '1';
                                Count_precharge (TO_INTEGER(Ba)) := 0;
                                IF Read_enable = '1' THEN
                                    Read_precharge (TO_INTEGER(Ba)) := '1';
                                ELSIF Write_enable = '1' THEN
                                    Write_precharge (TO_INTEGER(Ba)) := '1';
                                END IF;
                            END IF;
                        END IF;
                        
                        -- Read with AutoPrecharge Calculation
                        --      The device start internal precharge when:
                        --          1.  BL/2 cycles after command
                        --      and 2.  Meet tRAS requirement
                        --       or 3.  Interrupt by a Read or Write (with or without Auto Precharge)
                        IF ((Auto_precharge(0) = '1') AND (Read_precharge(0) = '1')) THEN
                            IF (((NOW - RAS_chk0 >= tRAS) AND
                                ((Burst_length_1 = '1' AND Count_precharge(0) >= 1)  OR
                                 (Burst_length_2 = '1' AND Count_precharge(0) >= 2)  OR
                                 (Burst_length_4 = '1' AND Count_precharge(0) >= 4)  OR
                                 (Burst_length_8 = '1' AND Count_precharge(0) >= 8))) OR
                                 (RW_interrupt_read(0) = '1')) THEN
                                Pc_b0 := '1';
                                Act_b0 := '0';
                                RP_chk0 := NOW;
                                Auto_precharge(0) := '0';
                                Read_precharge(0) := '0';
                                RW_interrupt_read(0) := '0';
                            END IF;
                        END IF;
                        IF ((Auto_precharge(1) = '1') AND (Read_precharge(1) = '1')) THEN
                            IF (((NOW - RAS_chk1 >= tRAS) AND
                                ((Burst_length_1 = '1' AND Count_precharge(1) >= 1)  OR
                                 (Burst_length_2 = '1' AND Count_precharge(1) >= 2)  OR
                                 (Burst_length_4 = '1' AND Count_precharge(1) >= 4)  OR
                                 (Burst_length_8 = '1' AND Count_precharge(1) >= 8))) OR
                                 (RW_interrupt_read(1) = '1')) THEN
                                Pc_b1 := '1';
                                Act_b1 := '0';
                                RP_chk1 := NOW;
                                Auto_precharge(1) := '0';
                                Read_precharge(1) := '0';
                                RW_interrupt_read(1) := '0';
                            END IF;
                        END IF;
                        IF ((Auto_precharge(2) = '1') AND (Read_precharge(2) = '1')) THEN
                            IF (((NOW - RAS_chk2 >= tRAS) AND
                                ((Burst_length_1 = '1' AND Count_precharge(2) >= 1)  OR
                                 (Burst_length_2 = '1' AND Count_precharge(2) >= 2)  OR
                                 (Burst_length_4 = '1' AND Count_precharge(2) >= 4)  OR
                                 (Burst_length_8 = '1' AND Count_precharge(2) >= 8))) OR
                                 (RW_interrupt_read(2) = '1')) THEN
                                Pc_b2 := '1';
                                Act_b2 := '0';
                                RP_chk2 := NOW;
                                Auto_precharge(2) := '0';
                                Read_precharge(2) := '0';
                                RW_interrupt_read(2) := '0';
                            END IF;
                        END IF;
                        IF ((Auto_precharge(3) = '1') AND (Read_precharge(3) = '1')) THEN
                            IF (((NOW - RAS_chk3 >= tRAS) AND
                                ((Burst_length_1 = '1' AND Count_precharge(3) >= 1)  OR
                                 (Burst_length_2 = '1' AND Count_precharge(3) >= 2)  OR
                                 (Burst_length_4 = '1' AND Count_precharge(3) >= 4)  OR
                                 (Burst_length_8 = '1' AND Count_precharge(3) >= 8))) OR
                                 (RW_interrupt_read(3) = '1')) THEN
                                Pc_b3 := '1';
                                Act_b3 := '0';
                                RP_chk3 := NOW;
                                Auto_precharge(3) := '0';
                                Read_precharge(3) := '0';
                                RW_interrupt_read(3) := '0';
                            END IF;
                        END IF;
                        
                        -- Write with AutoPrecharge Calculation
                        --      The device start internal precharge when:
                        --          1.  tWR cycles after command
                        --      and 2.  Meet tRAS requirement
                        --       or 3.  Interrupt by a Read or Write (with or without Auto Precharge)
                        IF ((Auto_precharge(0) = '1') AND (Write_precharge(0) = '1')) THEN
                            IF (((NOW - RAS_chk0 >= tRAS) AND
                               (((Burst_length_1 = '1' OR Write_burst_mode = '1' ) AND Count_precharge(0) >= 2)  OR
                                 (Burst_length_2 = '1'                             AND Count_precharge(0) >= 3)  OR
                                 (Burst_length_4 = '1'                             AND Count_precharge(0) >= 5)  OR
                                 (Burst_length_8 = '1'                             AND Count_precharge(0) >= 9))) OR
                                 (RW_interrupt_write(0) = '1' AND WR_chk(0) >= 3)) THEN
                                Pc_b0 := '1';
                                Act_b0 := '0';
                                RP_chk0 := NOW;
                                Auto_precharge(0) := '0';
                                Write_precharge(0) := '0';
                                RW_interrupt_write(0) := '0';
                            END IF;
                        END IF;
                        IF ((Auto_precharge(1) = '1') AND (Write_precharge(1) = '1')) THEN
                            IF (((NOW - RAS_chk1 >= tRAS) AND
                               (((Burst_length_1 = '1' OR Write_burst_mode = '1' ) AND Count_precharge(1) >= 2)  OR
                                 (Burst_length_2 = '1'                             AND Count_precharge(1) >= 3)  OR
                                 (Burst_length_4 = '1'                             AND Count_precharge(1) >= 5)  OR
                                 (Burst_length_8 = '1'                             AND Count_precharge(1) >= 9))) OR
                                 (RW_interrupt_write(1) = '1' AND WR_chk(1) >= 3)) THEN
                                Pc_b1 := '1';
                                Act_b1 := '0';
                                RP_chk1 := NOW;
                                Auto_precharge(1) := '0';
                                Write_precharge(1) := '0';
                                RW_interrupt_write(1) := '0';
                            END IF;
                        END IF;
                        IF ((Auto_precharge(2) = '1') AND (Write_precharge(2) = '1')) THEN
                            IF (((NOW - RAS_chk2 >= tRAS) AND
                               (((Burst_length_1 = '1' OR Write_burst_mode = '1' ) AND Count_precharge(2) >= 2)  OR
                                 (Burst_length_2 = '1'                             AND Count_precharge(2) >= 3)  OR
                                 (Burst_length_4 = '1'                             AND Count_precharge(2) >= 5)  OR
                                 (Burst_length_8 = '1'                             AND Count_precharge(2) >= 9))) OR
                                 (RW_interrupt_write(2) = '1' AND WR_chk(2) >= 3)) THEN
                                Pc_b2 := '1';
                                Act_b2 := '0';
                                RP_chk2 := NOW;
                                Auto_precharge(2) := '0';
                                Write_precharge(2) := '0';
                                RW_interrupt_write(2) := '0';
                            END IF;
                        END IF;
                        IF ((Auto_precharge(3) = '1') AND (Write_precharge(3) = '1')) THEN
                            IF (((NOW - RAS_chk3 >= tRAS) AND
                               (((Burst_length_1 = '1' OR Write_burst_mode = '1' ) AND Count_precharge(3) >= 2)  OR
                                 (Burst_length_2 = '1'                             AND Count_precharge(3) >= 3)  OR
                                 (Burst_length_4 = '1'                             AND Count_precharge(3) >= 5)  OR
                                 (Burst_length_8 = '1'                             AND Count_precharge(3) >= 9))) OR
                                 (RW_interrupt_write(3) = '1' AND WR_chk(3) >= 3)) THEN
                                Pc_b3 := '1';
                                Act_b3 := '0';
                                RP_chk3 := NOW;
                                Auto_precharge(3) := '0';
                                Write_precharge(3) := '0';
                                RW_interrupt_write(3) := '0';
                            END IF;
                        END IF;

                        -- Internal Precharge or Bst
                        IF Command(0) = PRECH THEN      -- Terminate a read if same bank or all banks
                            IF Bank_precharge(0) = Bank OR A10_precharge(0) = '1' THEN
                                IF Data_out_enable = '1' THEN
                                    Data_out_enable := '0';
                                END IF;
                            END IF;
                        ELSIF Command(0) = BST THEN     -- Terminate a read immediately
                            IF Data_out_enable = '1' THEN
                                Data_out_enable := '0';
                            END IF;
                        END IF;

                        IF Data_out_enable = '0' THEN
                            Dq <= TRANSPORT (OTHERS => 'Z') AFTER tOH;
                        END IF;

                        -- Detect Read or Write Command
                        IF Command(0) = READ OR Command(0) = READ_A THEN
                            Bank := Bank_addr (0);
                            Col := Col_addr (0);
                            Col_brst := Col_addr (0);
                            IF Bank_addr (0) = "00" THEN
                                Row := B0_row_addr;
                            ELSIF Bank_addr (0) = "01" THEN
                                Row := B1_row_addr;
                            ELSIF Bank_addr (0) = "10" THEN
                                Row := B2_row_addr;
                            ELSE
                                Row := B3_row_addr;
                            END IF;
                            Burst_counter := 0;
                            Data_in_enable := '0';
                            Data_out_enable := '1';
                        ELSIF Command(0) = WRITE OR Command(0) = WRITE_A THEN
                            Bank := Bank_addr(0);
                            Col := Col_addr(0);
                            Col_brst := Col_addr(0);
                            IF Bank_addr (0) = "00" THEN
                                Row := B0_row_addr;
                            ELSIF Bank_addr (0) = "01" THEN
                                Row := B1_row_addr;
                            ELSIF Bank_addr (0) = "10" THEN
                                Row := B2_row_addr;
                            ELSE
                                Row := B3_row_addr;
                            END IF;
                            Burst_counter := 0;
                            Data_in_enable := '1';
                            Data_out_enable := '0';
                        END IF;