control.fit.qmsg

VHDL编写的6层电梯控制器

{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 1 " "Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 1%" {  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Warning" "WFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "7 " "Warning: Following 7 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "alarm VCC " "Info: Pin alarm has VCC driving its datain port" {  } { { "Control.vhd" "" { Text "F:/08_Short Term/Control/Control.vhd" 13 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "alarm" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "Control" "UNKNOWN" "V1" "F:/08_Short Term/Control/db/Control.quartus_db" { Floorplan "F:/08_Short Term/Control/" "" "" { alarm } "NODE_NAME" } "" } } { "F:/08_Short Term/Control/Control.fld" "" { Floorplan "F:/08_Short Term/Control/Control.fld" "" "" { alarm } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "ovelight VCC " "Info: Pin ovelight has VCC driving its datain port" {  } { { "Control.vhd" "" { Text "F:/08_Short Term/Control/Control.vhd" 13 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "ovelight" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "Control" "UNKNOWN" "V1" "F:/08_Short Term/Control/db/Control.quartus_db" { Floorplan "F:/08_Short Term/Control/" "" "" { ovelight } "NODE_NAME" } "" } } { "F:/08_Short Term/Control/Control.fld" "" { Floorplan "F:/08_Short Term/Control/Control.fld" "" "" { ovelight } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "locklight VCC " "Info: Pin locklight has VCC driving its datain port" {  } { { "Control.vhd" "" { Text "F:/08_Short Term/Control/Control.vhd" 13 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "locklight" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "Control" "UNKNOWN" "V1" "F:/08_Short Term/Control/db/Control.quartus_db" { Floorplan "F:/08_Short Term/Control/" "" "" { locklight } "NODE_NAME" } "" } } { "F:/08_Short Term/Control/Control.fld" "" { Floorplan "F:/08_Short Term/Control/Control.fld" "" "" { locklight } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "lightup\[0\] VCC " "Info: Pin lightup\[0\] has VCC driving its datain port" {  } { { "Control.vhd" "" { Text "F:/08_Short Term/Control/Control.vhd" 15 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "lightup\[0\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "Control" "UNKNOWN" "V1" "F:/08_Short Term/Control/db/Control.quartus_db" { Floorplan "F:/08_Short Term/Control/" "" "" { lightup[0] } "NODE_NAME" } "" } } { "F:/08_Short Term/Control/Control.fld" "" { Floorplan "F:/08_Short Term/Control/Control.fld" "" "" { lightup[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "lightup\[6\] VCC " "Info: Pin lightup\[6\] has VCC driving its datain port" {  } { { "Control.vhd" "" { Text "F:/08_Short Term/Control/Control.vhd" 15 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "lightup\[6\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "Control" "UNKNOWN" "V1" "F:/08_Short Term/Control/db/Control.quartus_db" { Floorplan "F:/08_Short Term/Control/" "" "" { lightup[6] } "NODE_NAME" } "" } } { "F:/08_Short Term/Control/Control.fld" "" { Floorplan "F:/08_Short Term/Control/Control.fld" "" "" { lightup[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "lightdown\[1\] VCC " "Info: Pin lightdown\[1\] has VCC driving its datain port" {  } { { "Control.vhd" "" { Text "F:/08_Short Term/Control/Control.vhd" 15 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "lightdown\[1\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "Control" "UNKNOWN" "V1" "F:/08_Short Term/Control/db/Control.quartus_db" { Floorplan "F:/08_Short Term/Control/" "" "" { lightdown[1] } "NODE_NAME" } "" } } { "F:/08_Short Term/Control/Control.fld" "" { Floorplan "F:/08_Short Term/Control/Control.fld" "" "" { lightdown[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "lightdown\[6\] VCC " "Info: Pin lightdown\[6\] has VCC driving its datain port" {  } { { "Control.vhd" "" { Text "F:/08_Short Term/Control/Control.vhd" 15 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "lightdown\[6\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "Control" "UNKNOWN" "V1" "F:/08_Short Term/Control/db/Control.quartus_db" { Floorplan "F:/08_Short Term/Control/" "" "" { lightdown[6] } "NODE_NAME" } "" } } { "F:/08_Short Term/Control/Control.fld" "" { Floorplan "F:/08_Short Term/Control/Control.fld" "" "" { lightdown[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0}  } {  } 0 0 "Following %1!d! pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 1  Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Sep 09 20:50:33 2008 " "Info: Processing ended: Tue Sep 09 20:50:33 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:07 " "Info: Elapsed time: 00:00:07" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}