lift.map.qmsg

VHDL编写的6层电梯控制器

{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "control:inst\|locklight data_in VCC " "Warning: Reduced register \"control:inst\|locklight\" with stuck data_in port to stuck value VCC" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 12 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "control:inst\|alarm High " "Info: Power-up level of register \"control:inst\|alarm\" is not specified -- using power-up level of High to minimize register" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 12 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "control:inst\|alarm data_in VCC " "Warning: Reduced register \"control:inst\|alarm\" with stuck data_in port to stuck value VCC" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 12 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "display:inst1\|disp\[5\] data_in GND " "Warning: Reduced register \"display:inst1\|disp\[5\]\" with stuck data_in port to stuck value GND" {  } { { "display.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/display.vhd" 16 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "display:inst1\|disp\[0\] display:inst1\|disp\[3\] " "Info: Duplicate register \"display:inst1\|disp\[0\]\" merged to single register \"display:inst1\|disp\[3\]\"" {  } { { "display.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/display.vhd" 16 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "display:inst1\|disp\[6\] display:inst1\|disp\[3\] " "Info: Duplicate register \"display:inst1\|disp\[6\]\" merged to single register \"display:inst1\|disp\[3\]\"" {  } { { "display.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/display.vhd" 16 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "control:inst\|lup\[0\] control:inst\|lup\[6\] " "Info: Duplicate register \"control:inst\|lup\[0\]\" merged to single register \"control:inst\|lup\[6\]\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "control:inst\|lup\[4\] control:inst\|lup\[5\] " "Info: Duplicate register \"control:inst\|lup\[4\]\" merged to single register \"control:inst\|lup\[5\]\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "control:inst\|lup\[3\] control:inst\|lup\[5\] " "Info: Duplicate register \"control:inst\|lup\[3\]\" merged to single register \"control:inst\|lup\[5\]\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "control:inst\|lup\[2\] control:inst\|lup\[5\] " "Info: Duplicate register \"control:inst\|lup\[2\]\" merged to single register \"control:inst\|lup\[5\]\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "control:inst\|lup\[1\] control:inst\|lup\[5\] " "Info: Duplicate register \"control:inst\|lup\[1\]\" merged to single register \"control:inst\|lup\[5\]\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "control:inst\|ldown\[1\] control:inst\|ldown\[6\] " "Info: Duplicate register \"control:inst\|ldown\[1\]\" merged to single register \"control:inst\|ldown\[6\]\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "control:inst\|ldown\[4\] control:inst\|ldown\[5\] " "Info: Duplicate register \"control:inst\|ldown\[4\]\" merged to single register \"control:inst\|ldown\[5\]\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "control:inst\|ldown\[3\] control:inst\|ldown\[5\] " "Info: Duplicate register \"control:inst\|ldown\[3\]\" merged to single register \"control:inst\|ldown\[5\]\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "control:inst\|ldown\[2\] control:inst\|ldown\[5\] " "Info: Duplicate register \"control:inst\|ldown\[2\]\" merged to single register \"control:inst\|ldown\[5\]\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "control:inst\|ldown\[0\] control:inst\|ldown\[5\] " "Info: Duplicate register \"control:inst\|ldown\[0\]\" merged to single register \"control:inst\|ldown\[5\]\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "display:inst1\|disp\[1\] High " "Info: Power-up level of register \"display:inst1\|disp\[1\]\" is not specified -- using power-up level of High to minimize register" {  } { { "display.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/display.vhd" 16 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "display:inst1\|disp\[1\] data_in VCC " "Warning: Reduced register \"display:inst1\|disp\[1\]\" with stuck data_in port to stuck value VCC" {  } { { "display.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/display.vhd" 16 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "control:inst\|ldown\[6\] High " "Info: Power-up level of register \"control:inst\|ldown\[6\]\" is not specified -- using power-up level of High to minimize register" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "control:inst\|ldown\[6\] data_in VCC " "Warning: Reduced register \"control:inst\|ldown\[6\]\" with stuck data_in port to stuck value VCC" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "control:inst\|lup\[6\] High " "Info: Power-up level of register \"control:inst\|lup\[6\]\" is not specified -- using power-up level of High to minimize register" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "control:inst\|lup\[6\] data_in VCC " "Warning: Reduced register \"control:inst\|lup\[6\]\" with stuck data_in port to stuck value VCC" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|Lift\|control:inst\|state 10 " "Info: State machine \"\|Lift\|control:inst\|state\" contains 10 states" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 37 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|Lift\|control:inst\|state " "Info: Selected Auto state machine encoding method for state machine \"\|Lift\|control:inst\|state\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 37 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|Lift\|control:inst\|state " "Info: Encoding result for state machine \"\|Lift\|control:inst\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "10 " "Info: Completed encoding using 10 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "control:inst\|state.dw5 " "Info: Encoded state bit \"control:inst\|state.dw5\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "control:inst\|state.dw4 " "Info: Encoded state bit \"control:inst\|state.dw4\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "control:inst\|state.dw3 " "Info: Encoded state bit \"control:inst\|state.dw3\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "control:inst\|state.dw2 " "Info: Encoded state bit \"control:inst\|state.dw2\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "control:inst\|state.dw1 " "Info: Encoded state bit \"control:inst\|state.dw1\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "control:inst\|state.stop " "Info: Encoded state bit \"control:inst\|state.stop\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "control:inst\|state.down2 " "Info: Encoded state bit \"control:inst\|state.down2\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "control:inst\|state.down1 " "Info: Encoded state bit \"control:inst\|state.down1\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "control:inst\|state.up2 " "Info: Encoded state bit \"control:inst\|state.up2\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "control:inst\|state.up1 " "Info: Encoded state bit \"control:inst\|state.up1\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|Lift\|control:inst\|state.up1 0000000000 " "Info: State \"\|Lift\|control:inst\|state.up1\" uses code string \"0000000000\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|Lift\|control:inst\|state.up2 0000000011 " "Info: State \"\|Lift\|control:inst\|state.up2\" uses code string \"0000000011\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|Lift\|control:inst\|state.down1 0000000101 " "Info: State \"\|Lift\|control:inst\|state.down1\" uses code string \"0000000101\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|Lift\|control:inst\|state.down2 0000001001 " "Info: State \"\|Lift\|control:inst\|state.down2\" uses code string \"0000001001\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|Lift\|control:inst\|state.stop 0000010001 " "Info: State \"\|Lift\|control:inst\|state.stop\" uses code string \"0000010001\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|Lift\|control:inst\|state.dw1 0000100001 " "Info: State \"\|Lift\|control:inst\|state.dw1\" uses code string \"0000100001\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|Lift\|control:inst\|state.dw2 0001000001 " "Info: State \"\|Lift\|control:inst\|state.dw2\" uses code string \"0001000001\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|Lift\|control:inst\|state.dw3 0010000001 " "Info: State \"\|Lift\|control:inst\|state.dw3\" uses code string \"0010000001\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|Lift\|control:inst\|state.dw4 0100000001 " "Info: State \"\|Lift\|control:inst\|state.dw4\" uses code string \"0100000001\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|Lift\|control:inst\|state.dw5 1000000001 " "Info: State \"\|Lift\|control:inst\|state.dw5\" uses code string \"1000000001\"" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 55 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 37 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "locklight VCC " "Warning: Pin \"locklight\" stuck at VCC" {  } { { "Lift.bdf" "" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { 80 424 600 96 "locklight" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "ovelight VCC " "Warning: Pin \"ovelight\" stuck at VCC" {  } { { "Lift.bdf" "" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { 64 424 600 80 "ovelight" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "alarm VCC " "Warning: Pin \"alarm\" stuck at VCC" {  } { { "Lift.bdf" "" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { 48 424 600 64 "alarm" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "lightdown\[6\] VCC " "Warning: Pin \"lightdown\[6\]\" stuck at VCC" {  } { { "Lift.bdf" "" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { 128 424 600 144 "lightdown\[6..0\]" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "lightdown\[1\] VCC " "Warning: Pin \"lightdown\[1\]\" stuck at VCC" {  } { { "Lift.bdf" "" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { 128 424 600 144 "lightdown\[6..0\]" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "lightup\[6\] VCC " "Warning: Pin \"lightup\[6\]\" stuck at VCC" {  } { { "Lift.bdf" "" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { 112 424 600 128 "lightup\[6..0\]" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "lightup\[0\] VCC " "Warning: Pin \"lightup\[0\]\" stuck at VCC" {  } { { "Lift.bdf" "" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { 112 424 600 128 "lightup\[6..0\]" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "serout\[5\] GND " "Warning: Pin \"serout\[5\]\" stuck at GND" {  } { { "Lift.bdf" "" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { -56 696 872 -40 "serout\[6..0\]" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "serout\[1\] VCC " "Warning: Pin \"serout\[1\]\" stuck at VCC" {  } { { "Lift.bdf" "" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { -56 696 872 -40 "serout\[6..0\]" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0}
{ "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN_HDR" "1 " "Warning: Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "lock " "Warning: No output dependent on input pin \"lock\"" {  } { { "Lift.bdf" "" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { 408 344 512 424 "lock" "" } } } }  } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0}  } {  } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "188 " "Info: Implemented 188 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "12 " "Info: Implemented 12 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "25 " "Info: Implemented 25 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "151 " "Info: Implemented 151 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 23 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 23 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Sep 10 00:27:44 2008 " "Info: Processing ended: Wed Sep 10 00:27:44 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}