lift.map.qmsg

VHDL编写的6层电梯控制器

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.1 Build 176 10/26/2005 SJ Full Version " "Info: Version 5.1 Build 176 10/26/2005 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Sep 10 00:27:39 2008 " "Info: Processing started: Wed Sep 10 00:27:39 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off Lift -c Lift " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off Lift -c Lift" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "control.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file control.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 control-behave " "Info: Found design unit 1: control-behave" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 21 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 control " "Info: Found entity 1: control" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 6 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "unshake.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file unshake.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 unshake-a " "Info: Found design unit 1: unshake-a" {  } { { "unshake.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/unshake.vhd" 11 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 unshake " "Info: Found entity 1: unshake" {  } { { "unshake.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/unshake.vhd" 6 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "display.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file display.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 display-a " "Info: Found design unit 1: display-a" {  } { { "display.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/display.vhd" 11 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 display " "Info: Found entity 1: display" {  } { { "display.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/display.vhd" 6 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Lift.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file Lift.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 Lift " "Info: Found entity 1: Lift" {  } { { "Lift.bdf" "" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "Lift " "Info: Elaborating entity \"Lift\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "control control:inst " "Info: Elaborating entity \"control\" for hierarchy \"control:inst\"" {  } { { "Lift.bdf" "inst" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { 24 248 424 280 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "unshake unshake:inst2 " "Info: Elaborating entity \"unshake\" for hierarchy \"unshake:inst2\"" {  } { { "Lift.bdf" "inst2" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { -72 -224 -128 24 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "cp unshake.vhd(33) " "Warning (10492): VHDL Process Statement warning at unshake.vhd(33): signal \"cp\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "unshake.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/unshake.vhd" 33 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "display display:inst1 " "Info: Elaborating entity \"display\" for hierarchy \"display:inst1\"" {  } { { "Lift.bdf" "inst1" { Schematic "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/Lift.bdf" { { -80 536 696 16 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "control:inst\|ala High " "Info: Power-up level of register \"control:inst\|ala\" is not specified -- using power-up level of High to minimize register" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 47 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "control:inst\|ala data_in VCC " "Warning: Reduced register \"control:inst\|ala\" with stuck data_in port to stuck value VCC" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 47 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "control:inst\|ov High " "Info: Power-up level of register \"control:inst\|ov\" is not specified -- using power-up level of High to minimize register" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 47 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "control:inst\|ov data_in VCC " "Warning: Reduced register \"control:inst\|ov\" with stuck data_in port to stuck value VCC" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 47 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "control:inst\|loc High " "Info: Power-up level of register \"control:inst\|loc\" is not specified -- using power-up level of High to minimize register" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 47 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "control:inst\|loc data_in VCC " "Warning: Reduced register \"control:inst\|loc\" with stuck data_in port to stuck value VCC" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 47 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "control:inst\|ovelight High " "Info: Power-up level of register \"control:inst\|ovelight\" is not specified -- using power-up level of High to minimize register" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 12 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "control:inst\|ovelight data_in VCC " "Warning: Reduced register \"control:inst\|ovelight\" with stuck data_in port to stuck value VCC" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 12 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "control:inst\|locklight High " "Info: Power-up level of register \"control:inst\|locklight\" is not specified -- using power-up level of High to minimize register" {  } { { "control.vhd" "" { Text "F:/08_Short Term/数字系统设计/Lift (Ultimate_Version)/control.vhd" 12 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}