m.fit.summary

来自「基于Quartus II FPGA/CPLD数字系统设计实例（VHDL源代码文件」· SUMMARY 代码 · 共 17 行

Fitter Status : Successful - Wed May 09 15:49:52 2007
Quartus II Version : 7.1 Build 156 04/30/2007 SJ Full Version
Revision Name : m
Top-level Entity Name : m
Family : Cyclone II
Device : EP2C5T144C6
Timing Models : Final
Total logic elements : 10 / 4,608 ( < 1 % )
    Total combinational functions : 10 / 4,608 ( < 1 % )
    Dedicated logic registers : 10 / 4,608 ( < 1 % )
Total registers : 10
Total pins : 3 / 89 ( 3 % )
Total virtual pins : 0
Total memory bits : 0 / 119,808 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )