ctr.map.qmsg

vhdl的铜须等

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.0 Build 33 02/05/2007 SJ Full Version " "Info: Version 7.0 Build 33 02/05/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Nov 15 22:33:47 2008 " "Info: Processing started: Sat Nov 15 22:33:47 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off ctr -c ctr " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ctr -c ctr" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ctr.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ctr.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ctr-one " "Info: Found design unit 1: ctr-one" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 ctr " "Info: Found entity 1: ctr" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "ctr " "Info: Elaborating entity \"ctr\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "r2 r1 " "Info: Duplicate register \"r2\" merged to single register \"r1\", power-up level changed" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 20 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|ctr\|stax 4 " "Info: State machine \"\|ctr\|stax\" contains 4 states" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 17 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|ctr\|stax " "Info: Selected Auto state machine encoding method for state machine \"\|ctr\|stax\"" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 17 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|ctr\|stax " "Info: Encoding result for state machine \"\|ctr\|stax\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "4 " "Info: Completed encoding using 4 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "stax.sta4 " "Info: Encoded state bit \"stax.sta4\"" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 17 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "stax.sta3 " "Info: Encoded state bit \"stax.sta3\"" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 17 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "stax.sta2 " "Info: Encoded state bit \"stax.sta2\"" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 17 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "stax.sta1 " "Info: Encoded state bit \"stax.sta1\"" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 17 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ctr\|stax.sta1 0000 " "Info: State \"\|ctr\|stax.sta1\" uses code string \"0000\"" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 17 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ctr\|stax.sta2 0011 " "Info: State \"\|ctr\|stax.sta2\" uses code string \"0011\"" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 17 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ctr\|stax.sta3 0101 " "Info: State \"\|ctr\|stax.sta3\" uses code string \"0101\"" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 17 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ctr\|stax.sta4 1001 " "Info: State \"\|ctr\|stax.sta4\" uses code string \"1001\"" {  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 17 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "ctr.vhd" "" { Text "E:/vhd/state/ctr.vhd" 17 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "60 " "Info: Implemented 60 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "14 " "Info: Implemented 14 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "44 " "Info: Implemented 44 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "139 " "Info: Allocated 139 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Sat Nov 15 22:33:49 2008 " "Info: Processing ended: Sat Nov 15 22:33:49 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}