usbdl_usb_drv.c

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		{
			DRV_WriteReg8(USB_INDEX, EPno);
			CSR = DRV_Reg(USB_RXCSR);
			CSR &= ~USB_RXCSR_SENDSTALL;			
			DRV_WriteReg(USB_RXCSR, (CSR|USB_RXCSR_FLUSHFIFO|USB_RXCSR_CLRDATATOG));
			g_UsbDrvInfo.ep_rx_stall_status[EPno-1] = KAL_FALSE;
		}
		else
		{
			DRV_WriteReg8(USB_INDEX, EPno);
			CSR = DRV_Reg(USB_TXCSR);
			CSR &= ~USB_TXCSR_SENDSTALL;
			DRV_WriteReg(USB_TXCSR,(CSR|USB_TXCSR_FLUSHFIFO|USB_TXCSR_CLRDATATOG));
			g_UsbDrvInfo.ep_tx_stall_status[EPno-1] = KAL_FALSE;
		}
	}
#elif defined(DRV_USB_IP_V2)
	if (en == KAL_TRUE)
	{
		/* stall endpoint */
		if (direction == USB_RX_EP_TYPE)
		{
			WRITE_EPN_BDT_PID(EPno, USB_BDT_RX, VUSB_BDT_OWNS_BIT|VUSB_BDT_STALL_BIT);
			g_UsbDrvInfo.ep_rx_stall_status[EPno-1] = KAL_TRUE;
         	g_UsbDrvInfo.ep_out_data01[EPno-1] = 0;
        }
		else
		{
			WRITE_EPN_BDT_PID(EPno, USB_BDT_TX, VUSB_BDT_OWNS_BIT|VUSB_BDT_STALL_BIT);
			g_UsbDrvInfo.ep_tx_stall_status[EPno-1] = KAL_TRUE;
			g_UsbDrvInfo.ep_in_data01[EPno-1] = 0;
		}
	}
	else
	{
		/* clear stall */
		if (direction == USB_RX_EP_TYPE)
		{
			WRITE_EPN_BDT_PID(EPno, USB_BDT_RX, 0);
			g_UsbDrvInfo.ep_rx_stall_status[EPno-1] = KAL_FALSE;
			g_UsbDrvInfo.ep_out_data01[EPno-1] = 0;
		}
		else
		{
			WRITE_EPN_BDT_PID(EPno, USB_BDT_TX, 0);
			g_UsbDrvInfo.ep_tx_stall_status[EPno-1] = KAL_FALSE;
			g_UsbDrvInfo.ep_in_data01[EPno-1] = 0;
		}
	}
#elif defined(DRV_USB_IP_V1)

	if (en == KAL_TRUE)
	{
		/* stall endpoint */
		if (direction == USB_RX_EP_TYPE)
		{
			DRV_WriteReg8(USB_INDEX, EPno);
			CSR1 = DRV_Reg8(USB_OUTCSR1);
			CSR1 |= USB_OUTCSR1_SENDSTALL;
			DRV_WriteReg8(USB_OUTCSR1,(CSR1|USB_OUTCSR1_FLUSHFIFO|USB_OUTCSR1_CLRDATATOG));
			DRV_WriteReg8(USB_OUTCSR1, (CSR1|USB_OUTCSR1_FLUSHFIFO|USB_OUTCSR1_CLRDATATOG));
			g_UsbDrvInfo.ep_rx_stall_status[EPno-1] = KAL_TRUE;
		}
		else
		{
			DRV_WriteReg8(USB_INDEX, EPno);
			CSR1 = DRV_Reg8(USB_INCSR1);
			CSR1 |= USB_INCSR1_SENDSTALL;
			DRV_WriteReg8(USB_INCSR1,(CSR1|USB_INCSR1_FLUSHFIFO|USB_INCSR1_CLRDATATOG));
			DRV_WriteReg8(USB_INCSR1, (CSR1|USB_INCSR1_FLUSHFIFO|USB_INCSR1_CLRDATATOG));
			g_UsbDrvInfo.ep_tx_stall_status[EPno-1] = KAL_TRUE;
		}
	}
	else
	{
		/* clear stall */
		if (direction == USB_RX_EP_TYPE)
		{
			DRV_WriteReg8(USB_INDEX, EPno);
			CSR1 = DRV_Reg8(USB_OUTCSR1);
			CSR1 &= ~USB_OUTCSR1_SENDSTALL;
			DRV_WriteReg8(USB_OUTCSR1,(CSR1|USB_OUTCSR1_FLUSHFIFO|USB_OUTCSR1_CLRDATATOG));
			DRV_WriteReg8(USB_OUTCSR1, (CSR1|USB_OUTCSR1_FLUSHFIFO|USB_OUTCSR1_CLRDATATOG));
			g_UsbDrvInfo.ep_rx_stall_status[EPno-1] = KAL_FALSE;
		}
		else
		{
			DRV_WriteReg8(USB_INDEX, EPno);
			CSR1 = DRV_Reg8(USB_INCSR1);
			CSR1 &= ~USB_INCSR1_SENDSTALL;
			DRV_WriteReg8(USB_INCSR1,(CSR1|USB_INCSR1_FLUSHFIFO|USB_INCSR1_CLRDATATOG));
			DRV_WriteReg8(USB_INCSR1, (CSR1|USB_INCSR1_FLUSHFIFO|USB_INCSR1_CLRDATATOG));
			g_UsbDrvInfo.ep_tx_stall_status[EPno-1] = KAL_FALSE;
		}
	}
#endif	
}

/* get endpoint 0 status. (if transaction end or sent stall interrupt received)  */
void USB_Get_EP0_Status(kal_bool *p_transaction_end, kal_bool *p_sent_stall)
{
#if defined(DRV_USB_IP_V3)
	kal_uint16  	CSR0;

	DRV_WriteReg8(USB_INDEX, 0);
	CSR0 = DRV_Reg(USB_CSR0);

	if (CSR0 & USB_CSR0_SENTSTALL) 
		*p_sent_stall = KAL_TRUE;
	else
		*p_sent_stall = KAL_FALSE;
	
	if (CSR0 & USB_CSR0_SETUPEND) 
		*p_transaction_end = KAL_TRUE;
	else
		*p_transaction_end = KAL_FALSE;
#elif defined(DRV_USB_IP_V2)
	if((READ_EP0_BDT_PID(USB_BDT_RX, g_UsbDrvInfo.ep0_rx_even_odd^1) &VUSB_BDT_STALL_BIT) 
		&& (DRV_Reg8(USB_CTL)&VUSB_CTL_TXD_SUSPEND))
		*p_sent_stall = KAL_TRUE;
	else
		*p_sent_stall = KAL_FALSE;

	if(g_UsbDrvInfo.ep0_transaction_type == USB_EP0_TRANS_END)
		*p_transaction_end = KAL_TRUE;
	else
		*p_transaction_end = KAL_FALSE;
#elif defined(DRV_USB_IP_V1)
	kal_uint8 byCSR0;
	
	DRV_WriteReg8(USB_INDEX,0);
	byCSR0 = DRV_Reg8(USB_CSR0);

	if (byCSR0 & USB_CSR0_SENTSTALL) 
		*p_sent_stall = KAL_TRUE;
	else
		*p_sent_stall = KAL_FALSE;
	
	if (byCSR0 & USB_CSR0_SETUPEND) 
		*p_transaction_end = KAL_TRUE;
	else
		*p_transaction_end = KAL_FALSE;
#endif	
}


/* control endpoint 0 registers according to USB_EP0_DRV_STATE */
void USB_Update_EP0_State(USB_EP0_DRV_STATE state, kal_bool stall, kal_bool end)
{
#if defined(DRV_USB_IP_V3)
	kal_uint8   reg_state;
	kal_uint16   CSR0;

	/* clear sent stall */
	if(state == USB_EP0_DRV_STATE_CLEAR_SENT_STALL)
	{
		DRV_WriteReg8(USB_INDEX, 0);   
		CSR0 = DRV_Reg(USB_CSR0);
		DRV_WriteReg(USB_CSR0, CSR0&(~USB_CSR0_SENTSTALL));
		return;
	}

	/* clear transaction end*/
	if(state == USB_EP0_DRV_STATE_TRANSACTION_END)
	{
		DRV_WriteReg8(USB_INDEX, 0);   
		DRV_WriteReg(USB_CSR0, (USB_CSR0_SERVICEDSETUPEND));
		return;
	}

	/* ep0 read end or write ready*/
	if(state == USB_EP0_DRV_STATE_READ_END)
	{
		reg_state = USB_CSR0_SERVICEDRXPKTRDY;
	}
	else
	{
		reg_state = USB_CSR0_TXPKTRDY;
	}

	/* error occured, sent stall*/
	if(stall == KAL_TRUE)
	{
		reg_state |= USB_CSR0_SENDSTALL; 
	}

	/* last data for this transaction, set data end bit*/
	if(end == KAL_TRUE)
	{
		reg_state |= USB_CSR0_DATAEND; 
	}
	
	DRV_WriteReg8(USB_INDEX, 0);
	DRV_WriteReg(USB_CSR0, reg_state);

#elif defined(DRV_USB_IP_V2)
	/* clear sent stall*/
	if(state ==USB_EP0_DRV_STATE_CLEAR_SENT_STALL)
	{
		WRITE_EP0_BDT_PID(USB_BDT_RX, USB_BDT_EVEN, 
							READ_EP0_BDT_PID(USB_BDT_RX, USB_BDT_EVEN)&(~VUSB_BDT_STALL_BIT));
		WRITE_EP0_BDT_PID(USB_BDT_RX, USB_BDT_ODD, 
							READ_EP0_BDT_PID(USB_BDT_RX, USB_BDT_ODD)&(~VUSB_BDT_STALL_BIT));
		WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_EVEN, 
							READ_EP0_BDT_PID(USB_BDT_TX, USB_BDT_EVEN)&(~VUSB_BDT_STALL_BIT));
		WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_ODD, 
							READ_EP0_BDT_PID(USB_BDT_TX, USB_BDT_ODD)&(~VUSB_BDT_STALL_BIT));
		return;
	}

	/* clear transaction end*/
	if(state ==USB_EP0_DRV_STATE_TRANSACTION_END)
	{
		EXT_ASSERT((g_UsbDrvInfo.ep0_current_dir==0), 0, 0, 0);
		/* clear the data in sent buffer */
		WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_EVEN, 0);
		WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_ODD, 0);
		WRITE_EP0_BDT_PID(USB_BDT_RX, g_UsbDrvInfo.ep0_rx_even_odd, 
							(USB_EP0_MAXP << VUSB_BDT_BC_SHIFT) |VUSB_BDT_OWNS_BIT);
		g_UsbDrvInfo.ep0_transaction_type = USB_EP0_TRANS_NONE;
		return;
	}

	/* ep0 read end or write ready*/
	if((state == USB_EP0_DRV_STATE_READ_END) && (stall==KAL_FALSE))
	{
		/* clear tx suspend for setupt packet*/
		if(DRV_Reg8(USB_CTL)&VUSB_CTL_TXD_SUSPEND)
		{
			g_UsbDrvInfo.ep0_tx_data01 = 0;
			/* clear the data in sent buffer */
			WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_EVEN, 0);
			WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_ODD, 0);
			DRV_Reg8(USB_CTL) = DRV_Reg8(USB_CTL)&(~VUSB_CTL_TXD_SUSPEND);
		}	

		WRITE_EP0_BDT_PID(USB_BDT_RX, g_UsbDrvInfo.ep0_rx_even_odd, 
							(USB_EP0_MAXP << VUSB_BDT_BC_SHIFT) |VUSB_BDT_OWNS_BIT);
		g_UsbDrvInfo.ep0_transaction_type = USB_EP0_TRANS_RX_DATA;
	}
	else if((state == USB_EP0_DRV_STATE_WRITE_RDY) && (stall==KAL_FALSE))
	{
		/* toggle DATA01*/
		g_UsbDrvInfo.ep0_tx_data01^=1;
		WRITE_EP0_BDT_PID(USB_BDT_TX, g_UsbDrvInfo.ep0_tx_even_odd, 
							(READ_EP0_BDT_PID(USB_BDT_TX, g_UsbDrvInfo.ep0_tx_even_odd)&VUSB_BDT_BC_MASK) 
							|(g_UsbDrvInfo.ep0_tx_data01<<VUSB_BDT_DATA01_SHIFT) 
							| VUSB_BDT_DTS_BIT | VUSB_BDT_OWNS_BIT);
		g_UsbDrvInfo.ep0_transaction_type = USB_EP0_TRANS_TX_DATA;
	}
	
	/* error occured, sent stall*/	
	if(stall == KAL_TRUE)
	{
		WRITE_EP0_BDT_PID(USB_BDT_RX, USB_BDT_EVEN, 
							READ_EP0_BDT_PID(USB_BDT_RX, USB_BDT_EVEN)|VUSB_BDT_STALL_BIT);
		WRITE_EP0_BDT_PID(USB_BDT_RX, USB_BDT_ODD, 
							READ_EP0_BDT_PID(USB_BDT_RX, USB_BDT_ODD)|VUSB_BDT_STALL_BIT);
		WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_EVEN, 
							READ_EP0_BDT_PID(USB_BDT_RX, USB_BDT_EVEN)|VUSB_BDT_STALL_BIT);
		WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_ODD, 
							READ_EP0_BDT_PID(USB_BDT_RX, USB_BDT_ODD)|VUSB_BDT_STALL_BIT);
		g_UsbDrvInfo.ep0_transaction_type = USB_EP0_TRANS_NONE;
	}
	/* last data for this transaction, set data end bit*/
	else if(end == KAL_TRUE)
	{
		if(g_UsbDrvInfo.ep0_transaction_type==USB_EP0_TRANS_RX_DATA)
		{
			/* status data01 always 1*/
			g_UsbDrvInfo.ep0_tx_data01 = 1;
			/* byte count 0 */
			WRITE_EP0_BDT_PID(USB_BDT_TX, g_UsbDrvInfo.ep0_tx_even_odd, 
								(g_UsbDrvInfo.ep0_tx_data01<<VUSB_BDT_DATA01_SHIFT) |
								VUSB_BDT_DTS_BIT | VUSB_BDT_OWNS_BIT);
			g_UsbDrvInfo.ep0_transaction_type = USB_EP0_TRANS_RX_STATUS;
		}
		else if(g_UsbDrvInfo.ep0_transaction_type==USB_EP0_TRANS_TX_DATA)
		{					
			g_UsbDrvInfo.ep0_transaction_type = USB_EP0_TRANS_TX_DATA_END;
		}
		else
		{
			EXT_ASSERT(0, g_UsbDrvInfo.ep0_transaction_type, state, stall);
		}
	}
#elif defined(DRV_USB_IP_V1)
	kal_uint8   reg_state;
	kal_uint8   byCSR0;

	/* clear sent stall*/
	if(state ==USB_EP0_DRV_STATE_CLEAR_SENT_STALL)
	{
		DRV_WriteReg8(USB_INDEX,0);   
		byCSR0 = DRV_Reg8(USB_CSR0);
		DRV_WriteReg8(USB_CSR0, byCSR0&(~USB_CSR0_SENTSTALL));
		return;
	}

	/* clear transaction end*/
	if(state ==USB_EP0_DRV_STATE_TRANSACTION_END)
	{
		DRV_WriteReg8(USB_INDEX,0);   
		DRV_WriteReg8(USB_CSR0, (USB_CSR0_SERVICESETUPEND));
		return;
	}

	/* ep0 read end or write ready*/
	if(state == USB_EP0_DRV_STATE_READ_END)
	{
		reg_state = USB_CSR0_SERVICEDOUTPKTRDY;
	}
	else
	{
		reg_state = USB_CSR0_INPKTRDY;
	}

	/* error occured, sent stall*/	
	if(stall == KAL_TRUE)
	{
		reg_state |= USB_CSR0_SENDSTALL; 
	}
	/* last data for this transaction, set data end bit*/
	if(end == KAL_TRUE)
	{
		reg_state |= USB_CSR0_DATAEND; 
	}
	
	DRV_WriteReg8(USB_INDEX,0);   
	DRV_WriteReg8(USB_CSR0, reg_state);
#endif		
}

/* return packet length for endpoint 0*/
kal_uint32 USB_EP0_Pkt_Len(void)
{
	kal_uint32 nCount = 0;
	
#if defined(DRV_USB_IP_V3)
	kal_uint16  CSR0;
	
	DRV_WriteReg8(USB_INDEX, 0);
	CSR0 = DRV_Reg(USB_CSR0);
	
	if(CSR0&USB_CSR0_RXPKTRDY)
		nCount = (kal_uint32)DRV_Reg8(USB_COUNT0);
#elif defined(DRV_USB_IP_V2)
	if((READ_EP0_BDT_PID(USB_BDT_RX, g_UsbDrvInfo.ep0_rx_even_odd) &VUSB_BDT_OWNS_BIT)==0)
	{
		nCount = (READ_EP0_BDT_PID(USB_BDT_RX, g_UsbDrvInfo.ep0_rx_even_odd) & VUSB_BDT_BC_MASK)
				>>VUSB_BDT_BC_SHIFT;
	}
#elif defined(DRV_USB_IP_V1)
	kal_uint8 byCSR0;
	
	DRV_WriteReg8(USB_INDEX,0);
	byCSR0 = DRV_Reg8(USB_CSR0);
	
	if(byCSR0 & USB_CSR0_OUTPKTRDY)
	{
		nCount = (kal_uint32)DRV_Reg8(USB_COUNT0);
	}
#endif

	return nCount;
}

/* ep in data prepared ready, set ready bit */
void USB_EP_Bulk_Tx_Ready(kal_uint8 ep_num)
{
	if((ep_num==0)||(ep_num>MAX_INTR_EP_NUM))
		EXT_ASSERT(0, ep_num, 0, 0);

#if defined(DRV_USB_IP_V3)
	DRV_WriteReg8(USB_INDEX, ep_num);
	DRV_WriteReg(USB_TXCSR, DRV_Reg(USB_TXCSR)|USB_TXCSR_TXPKTRDY);	
#elif defined(DRV_USB_IP_V2)
	WRITE_EPN_BDT_PID(ep_num, USB_BDT_TX, 
							(READ_EPN_BDT_PID(ep_num, USB_BDT_TX) & VUSB_BDT_BC_MASK) |
							(g_UsbDrvInfo.ep_in_data01[ep_num-1]<<VUSB_BDT_DATA01_SHIFT) |
							VUSB_BDT_DTS_BIT | VUSB_BDT_OWNS_BIT);
	g_UsbDrvInfo.ep_in_data01[ep_num-1]^=1;
#elif defined(DRV_USB_IP_V1)
	DRV_WriteReg8(USB_INDEX,ep_num);
	DRV_WriteReg8(USB_INCSR1, USB_INCSR1_INPKTRDY);
#endif
}

/* return ep out received packet length*/
kal_uint32 USB_EP_Rx_Pkt_Len(kal_uint8 ep_num)
{
#if defined(DRV_USB_IP_V3)
	kal_uint16 CSR;
#elif defined(DRV_USB_IP_V1)
	kal_uint8 byCSR;
#endif
	kal_uint32 nCount = 0;
	
	if((ep_num==0)||(ep_num>MAX_INTR_EP_NUM))
		EXT_ASSERT(0, ep_num, 0, 0);
	
#if defined(DRV_USB_IP_V3)
	DRV_WriteReg8(USB_INDEX, ep_num);
	CSR = DRV_Reg(USB_RXCSR);
	
	if(CSR&USB_RXCSR_RXPKTRDY)
		nCount = (kal_uint32)DRV_Reg(USB_RXCOUNT);
#elif defined(DRV_USB_IP_V2)
	if((READ_EPN_BDT_PID(ep_num, USB_BDT_RX)&VUSB_BDT_OWNS_BIT)==0)
	{
		nCount = (READ_EPN_BDT_PID(ep_num, USB_BDT_RX)&VUSB_BDT_BC_MASK) 
				>> VUSB_BDT_BC_SHIFT;
	}
#elif defined(DRV_USB_IP_V1)	
	DRV_WriteReg8(USB_INDEX,ep_num);
	byCSR = DRV_Reg8(USB_OUTCSR1);
	
	if(byCSR & USB_OUTCSR1_OUTPKTRDY)
	{
		nCount = (kal_uint32)DRV_Reg8(USB_OUTCOUNT1);
	}
#endif
	return nCount;
}	


/* ep out data already read out, clear the data*/
void USB_EP_Bulk_Rx_Ready(kal_uint8 ep_num)
{
	if((ep_num==0)||(ep_num>MAX_INTR_EP_NUM))
		EXT_ASSERT(0, ep_num, 0, 0);

#if defined(DRV_USB_IP_V3)
	DRV_WriteReg8(USB_INDEX, ep_num);
	DRV_WriteReg(USB_RXCSR, DRV_Reg(USB_RXCSR)&(~USB_RXCSR_RXPKTRDY));
#elif defined(DRV_USB_IP_V2)
	WRITE_EPN_BDT_PID(ep_num, USB_BDT_RX, 
								(g_UsbDrvInfo.ep_out_max_data_size[ep_num-1] << VUSB_BDT_BC_SHIFT) |
								(g_UsbDrvInfo.ep_out_data01[ep_num-1]<<VUSB_BDT_DATA01_SHIFT) |
								VUSB_BDT_DTS_BIT | VUSB_BDT_OWNS_BIT);
	g_UsbDrvInfo.ep_out_data01[ep_num-1]^=1;
#elif defined(DRV_USB_IP_V1)
	DRV_WriteReg8(USB_INDEX,ep_num);
	DRV_WriteReg8(USB_OUTCSR1, 0);
#endif
}

/* Get status. See if ep in fifo is empty. 
   If false, it means some data in fifo still wait to send out */
kal_bool USB_Is_EP_Bulk_Tx_Empty(kal_uint8 ep_num)
{
#if defined(DRV_USB_IP_V3)
	kal_uint16  	CSR;
#elif defined(DRV_USB_IP_V1)
	kal_uint8 byCSR;
#endif
	kal_bool bRet;
	
	if((ep_num==0)||(ep_num>MAX_INTR_EP_NUM))
		EXT_ASSERT(0, ep_num, 0, 0);

#if defined(DRV_USB_IP_V3)
	DRV_WriteReg8(USB_INDEX, ep_num);	
	CSR = DRV_Reg(USB_TXCSR);
	if(CSR&USB_TXCSR_FIFONOTEMPTY)
		return  KAL_FALSE;
	else
		return  KAL_TRUE;	
#elif defined(DRV_USB_IP_V2)
	/* own bit 1 means the data is still not sent out */
	if((READ_EPN_BDT_PID(ep_num, USB_BDT_TX)&VUSB_BDT_OWNS_BIT)!=0)
		bRet = KAL_FALSE;
	else
12345

usbdl_usb_drv.c - 源码说明

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