symbol.sb

Modelsim FLI接口设计实例

DocumentHdrVersion "1.1"
Header (DocumentHdr
dmPackageRefs [
(DmPackageRef
library "ieee"
unitName "std_logic_1164"
)
]
)
version "16.1"
appVersion "2003.2 (Build 28)"
model (Symbol
VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "D:\\hdl_designs\\uart\\uart_lib\\hdl"
)
(vvPair
variable "HDSDir"
value "D:\\hdl_designs\\uart\\uart_lib\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "D:\\hdl_designs\\uart\\uart_lib\\hds\\uarttop2\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "D:\\hdl_designs\\uart\\uart_lib\\hds\\uarttop2\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "D:\\hdl_designs\\uart\\uart_lib\\hds"
)
(vvPair
variable "appl"
value "HDL Designer"
)
(vvPair
variable "arch_name"
value "symbol"
)
(vvPair
variable "config"
value "%(unit)_config"
)
(vvPair
variable "d"
value "D:\\hdl_designs\\uart\\uart_lib\\hds\\uarttop2"
)
(vvPair
variable "d_logical"
value "D:\\hdl_designs\\uart\\uart_lib\\hds\\uarttop2"
)
(vvPair
variable "date"
value "18/08/2003"
)
(vvPair
variable "day"
value "Mon"
)
(vvPair
variable "day_long"
value "Monday"
)
(vvPair
variable "dd"
value "18"
)
(vvPair
variable "entity_name"
value "uarttop2"
)
(vvPair
variable "ext"
value "sb"
)
(vvPair
variable "f"
value "symbol.sb"
)
(vvPair
variable "f_logical"
value "symbol.sb"
)
(vvPair
variable "group"
value "UNKNOWN"
)
(vvPair
variable "host"
value "ACHILLES"
)
(vvPair
variable "library"
value "uart_lib"
)
(vvPair
variable "library_downstream_ModelSimCompiler"
value "D:/hdl_designs/uart/uart_lib/work/"
)
(vvPair
variable "mm"
value "08"
)
(vvPair
variable "module_name"
value "uarttop2"
)
(vvPair
variable "month"
value "Aug"
)
(vvPair
variable "month_long"
value "August"
)
(vvPair
variable "p"
value "D:\\hdl_designs\\uart\\uart_lib\\hds\\uarttop2\\symbol.sb"
)
(vvPair
variable "p_logical"
value "D:\\hdl_designs\\uart\\uart_lib\\hds\\uarttop2\\symbol.sb"
)
(vvPair
variable "project_name"
value "uart"
)
(vvPair
variable "series"
value "HDL Designer Series"
)
(vvPair
variable "task_DesignCompilerPath"
value "<TBD>"
)
(vvPair
variable "task_LeonardoPath"
value "<TBD>"
)
(vvPair
variable "task_ModelSimPath"
value "<TBD>"
)
(vvPair
variable "task_NC"
value "<TBD>"
)
(vvPair
variable "task_PrecisionRTLPath"
value "D:/PRODUCTS/PRECISIONSYNTHESIS2003/MGC_HOME/BIN"
)
(vvPair
variable "task_VCSPath"
value "<TBD>"
)
(vvPair
variable "time"
value "16:32:08"
)
(vvPair
variable "unit"
value "uarttop2"
)
(vvPair
variable "user"
value "Hans"
)
(vvPair
variable "version"
value "2003.2 (Build 28)"
)
(vvPair
variable "view"
value "symbol"
)
(vvPair
variable "year"
value "2003"
)
(vvPair
variable "yy"
value "03"
)
]
)
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ps "OnEdgeStrategy"
shape (Triangle
uid 53,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,6625,15000,7375"
)
n "clk"
t "std_logic"
o 1
r 1
tg (CPTG
uid 54,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 55,0
va (VaSet
)
xt "16000,6500,16900,7500"
st "clk"
blo "16000,7300"
tm "CptPortNameMgr"
)
)
dt (MLText
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va (VaSet
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xt "44000,2000,60000,2800"
st "clk     : IN     std_logic  ;
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m 1
o 1
r 2
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ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
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va (VaSet
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xt "30100,6500,32000,7500"
st "ferror"
ju 2
blo "32000,7300"
tm "CptPortNameMgr"
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)
dt (MLText
uid 61,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6000,60000,6800"
st "ferror  : OUT    std_logic  ;
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)
)
*4 (CptPort
uid 62,0
ps "OnEdgeStrategy"
shape (Triangle
uid 63,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,7625,15000,8375"
)
n "resetn"
t "std_logic"
o 1
r 3
tg (CPTG
uid 64,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 65,0
va (VaSet
)
xt "16000,7500,18100,8500"
st "resetn"
blo "16000,8300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 66,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2800,60000,3600"
st "resetn  : IN     std_logic  ;
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uid 67,0
ps "OnEdgeStrategy"
shape (Triangle
uid 68,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
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xt "14250,8625,15000,9375"
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n "rx"
t "std_logic"
o 1
r 4
tg (CPTG
uid 69,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 70,0
va (VaSet
)
xt "16000,8500,16600,9500"
st "rx"
blo "16000,9300"
tm "CptPortNameMgr"
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)
dt (MLText
uid 71,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3600,60000,4400"
st "rx      : IN     std_logic  ;
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)
)
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uid 72,0
ps "OnEdgeStrategy"
shape (Triangle
uid 73,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,9625,15000,10375"
)
n "rxclk16"
t "std_logic"
o 1
r 5
tg (CPTG
uid 74,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 75,0
va (VaSet
)
xt "16000,9500,18300,10500"
st "rxclk16"
blo "16000,10300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 76,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4400,60000,5200"
st "rxclk16 : IN     std_logic  ;
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)
)
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uid 77,0
ps "OnEdgeStrategy"
shape (Triangle
uid 78,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "33000,7625,33750,8375"
)
n "tx"
t "std_logic"
m 1
o 1
r 6
tg (CPTG
uid 79,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 80,0
va (VaSet
)
xt "31500,7500,32000,8500"
st "tx"
ju 2
blo "32000,8300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 81,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6800,59000,7600"
st "tx      : OUT    std_logic 
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)
)
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uid 82,0
ps "OnEdgeStrategy"
shape (Triangle
uid 83,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,10625,15000,11375"
)
n "txclk"
t "std_logic"
o 1
r 7
tg (CPTG
uid 84,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 85,0
va (VaSet
)
xt "16000,10500,17400,11500"
st "txclk"
blo "16000,11300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 86,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5200,60000,6000"
st "txclk   : IN     std_logic  ;
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)
)
]
shape (Rectangle
uid 9,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "15000,6000,33000,26000"
)
biTextGroup (BiTextGroup
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ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
uid 11,0
va (VaSet
font "Arial,8,1"
)
xt "22400,15000,25200,16000"
st "uart_lib"
blo "22400,15800"
)
second (Text
uid 12,0
va (VaSet
font "Arial,8,1"
)
xt "22400,16000,25600,17000"
st "uarttop2"
blo "22400,16800"
)
)
gi *9 (GenericInterface
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ps "CenterOffsetStrategy"
matrix (Matrix
uid 14,0
text (MLText
uid 15,0
va (VaSet
isHidden 1
font "Courier New,8,0"
)
xt "0,12000,0,12000"
)
header "Generic Declarations"
)
elements [
]
)
portInstanceVisAsIs 1
portInstanceVis (PortSigDisplay
sIVOD 1
)
portVis (PortSigDisplay
sIVOD 1
)
)
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uid 16,0
optionalChildren [
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shape (Rectangle
uid 19,0
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va (VaSet
vasetType 1
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xt "36000,48000,53000,49000"
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oxt "18000,70000,35000,71000"
text (MLText
uid 20,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "36200,48000,45500,49000"
st "
by %user on %dd %month %year
"
tm "CommentText"
wrapOption 3