_struct.bd._fpf

Modelsim FLI接口设计实例

ARCHITECTURES list {
 {uarttop struct} list {
  TASK_SETTINGS list {
   PLUGIN_SETTINGS list {
    SpectrumDataPrep atom {TaskSetting exepath D:/PRODUCTS/LEOSPEC/LS2003A_33/BIN/WIN32 TaskSetting alteraPath {$QUARTUS_ROOTDIR/bin} TaskSetting xilinxPath {$XILINX/bin/nt} TaskSetting ddirectPath {$DDIRECT/ispcomp/bin} TaskSetting manufacturer Altera TaskSetting family {APEX II} TaskSetting device EP2A15F672C TaskSetting speedGrade 7 TaskSetting wireTable apexii_default TaskSetting technology apexii TaskSetting designFrequency {} TaskSetting optimization 0 TaskSetting hierarchy 0 TaskSetting addIoPad 1 TaskSetting extendedEffort 0 TaskSetting boundaryOptimize 1 TaskSetting clearDesignData 0 TaskSetting runSynthesize 1 TaskSetting runOptimize 1 TaskSetting runPlaceAndRoute 0 TaskSetting netlistFormat 0 TaskSetting appendGenerics 0 TaskSetting style 0 TaskSetting useWorkLib 1 TaskSetting includePrePostScripts 1 TaskSetting preConstraintFile pre_analyze.tcl TaskSetting postConstraintFile post_elaborate.tcl TaskSetting sourceTopLevelConstraintFile 0 TaskSetting topLevelConstraintFile {}}
   }
  }
 }
}