struct.bd

Modelsim FLI接口设计实例

xt "12000,18625,13500,19375"
)
(Line
uid 580,0
sl 0
ro 270
xt "13500,19000,14000,19000"
pts [
"13500,19000"
"14000,19000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 581,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 582,0
va (VaSet
)
xt "8700,18500,11000,19500"
st "rxclk16"
ju 2
blo "11000,19300"
tm "WireNameMgr"
)
)
)
*59 (Net
uid 587,0
name "rxclk16"
type "std_logic"
orderNo 13
declText (MLText
uid 588,0
va (VaSet
font "Courier New,8,0"
)
xt "15000,6400,25500,7200"
st "rxclk16 : std_logic"
)
)
*60 (Net
uid 589,0
name "txclk"
type "std_logic"
orderNo 13
declText (MLText
uid 590,0
va (VaSet
font "Courier New,8,0"
)
xt "15000,7200,25500,8000"
st "txclk   : std_logic"
)
)
*61 (PortIoIn
uid 595,0
shape (CompositeShape
uid 596,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 597,0
sl 0
ro 90
xt "53500,32625,55000,33375"
)
(Line
uid 598,0
sl 0
ro 90
xt "53000,33000,53500,33000"
pts [
"53500,33000"
"53000,33000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 599,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 600,0
va (VaSet
)
xt "56000,32500,57400,33500"
st "txclk"
blo "56000,33300"
tm "WireNameMgr"
)
)
)
*62 (Net
uid 601,0
name "dbusin"
type "std_logic_vector"
bounds "(7 DOWNTO 0)"
orderNo 13
declText (MLText
uid 602,0
va (VaSet
font "Courier New,8,0"
)
xt "15000,3200,35500,4000"
st "dbusin  : std_logic_vector(7 DOWNTO 0)"
)
)
*63 (Wire
uid 135,0
optionalChildren [
*64 (BdJunction
uid 569,0
ps "OnConnectorStrategy"
shape (Circle
uid 570,0
va (VaSet
vasetType 1
)
xt "21600,16600,22400,17400"
radius 400
)
)
]
shape (OrthoPolyLine
uid 136,0
va (VaSet
vasetType 3
)
xt "14000,17000,28250,17000"
pts [
"14000,17000"
"28250,17000"
]
)
start &38
end &13
sat 32
eat 32
stc 0
st 0
si 0
tg (WTG
uid 137,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 138,0
va (VaSet
isHidden 1
)
xt "16000,16000,16900,17000"
st "clk"
blo "16000,16800"
tm "WireNameMgr"
)
)
on &37
)
*65 (Wire
uid 159,0
optionalChildren [
*66 (BdJunction
uid 563,0
ps "OnConnectorStrategy"
shape (Circle
uid 564,0
va (VaSet
vasetType 1
)
xt "20600,20600,21400,21400"
radius 400
)
)
]
shape (OrthoPolyLine
uid 160,0
va (VaSet
vasetType 3
)
xt "14000,21000,28250,21000"
pts [
"14000,21000"
"28250,21000"
]
)
start &40
end &15
sat 32
eat 32
stc 0
st 0
si 0
tg (WTG
uid 161,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 162,0
va (VaSet
isHidden 1
)
xt "16000,20000,18100,21000"
st "resetn"
blo "16000,20800"
tm "WireNameMgr"
)
)
on &39
)
*67 (Wire
uid 171,0
shape (OrthoPolyLine
uid 172,0
va (VaSet
vasetType 3
)
xt "14000,23000,28250,23000"
pts [
"14000,23000"
"28250,23000"
]
)
start &42
end &18
sat 32
eat 32
stc 0
st 0
si 0
tg (WTG
uid 173,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 174,0
va (VaSet
isHidden 1
)
xt "16000,22000,16700,23000"
st "rd"
blo "16000,22800"
tm "WireNameMgr"
)
)
on &41
)
*68 (Wire
uid 213,0
shape (OrthoPolyLine
uid 214,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "40750,17000,53000,17000"
pts [
"40750,17000"
"47000,17000"
"53000,17000"
]
)
start &16
end &43
sat 32
eat 32
sty 1
stc 0
st 0
si 0
tg (WTG
uid 215,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 216,0
va (VaSet
isHidden 1
)
xt "42750,16000,45350,17000"
st "dbusout"
blo "42750,16800"
tm "WireNameMgr"
)
)
on &44
)
*69 (Wire
uid 289,0
shape (OrthoPolyLine
uid 290,0
va (VaSet
vasetType 3
)
xt "40750,21000,53000,21000"
pts [
"40750,21000"
"47000,21000"
"53000,21000"
]
)
start &19
end &46
sat 32
eat 32
stc 0
st 0
si 0
tg (WTG
uid 291,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 292,0
va (VaSet
isHidden 1
)
xt "42750,18000,44650,19000"
st "ferror"
blo "42750,18800"
tm "WireNameMgr"
)
)
on &45
)
*70 (Wire
uid 301,0
shape (OrthoPolyLine
uid 302,0
va (VaSet
vasetType 3
)
xt "40750,19000,53000,19000"
pts [
"40750,19000"
"47000,19000"
"53000,19000"
]
)
start &17
end &48
sat 32
eat 32
stc 0
st 0
si 0
tg (WTG
uid 303,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 304,0
va (VaSet
isHidden 1
)
xt "42750,17000,43950,18000"
st "rdrf"
blo "42750,17800"
tm "WireNameMgr"
)
)
on &47
)
*71 (Wire
uid 501,0
shape (OrthoPolyLine
uid 502,0
va (VaSet
vasetType 3
)
xt "40750,23000,53000,23000"
pts [
"53000,23000"
"40750,23000"
]
)
start &50
end &20
sat 32
eat 32
stc 0
st 0
si 0
tg (WTG
uid 503,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 504,0
va (VaSet
isHidden 1
)
xt "52000,22000,52600,23000"
st "rx"
blo "52000,22800"
tm "WireNameMgr"
)
)
on &49
)
*72 (Wire
uid 513,0
shape (OrthoPolyLine
uid 514,0
va (VaSet
vasetType 3
)
xt "40750,30000,53000,30000"
pts [
"40750,30000"
"47000,30000"
"53000,30000"
]
)
start &31
end &52
sat 32
eat 32
stc 0
st 0
si 0
tg (WTG
uid 515,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 516,0
va (VaSet
isHidden 1
)
xt "42750,29000,43250,30000"
st "tx"
blo "42750,29800"
tm "WireNameMgr"
)
)
on &51
)
*73 (Wire
uid 525,0
shape (OrthoPolyLine
uid 526,0
va (VaSet
vasetType 3
)
xt "14000,34000,28250,34000"
pts [
"28250,34000"
"14000,34000"
]
)
start &29
end &54
sat 32
eat 32
stc 0
st 0
si 0
tg (WTG
uid 527,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 528,0
va (VaSet
isHidden 1
)
xt "26250,33000,27550,34000"
st "tdre"
blo "26250,33800"
tm "WireNameMgr"
)
)
on &53
)
*74 (Wire
uid 537,0
shape (OrthoPolyLine
uid 538,0
va (VaSet
vasetType 3
)
xt "14000,32000,28250,32000"
pts [
"14000,32000"
"28250,32000"
]
)
start &56
end &30
sat 32
eat 32
stc 0
st 0
si 0
tg (WTG
uid 539,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 540,0
va (VaSet
isHidden 1
)
xt "16000,31000,16800,32000"
st "wr"
blo "16000,31800"
tm "WireNameMgr"
)
)
on &55
)
*75 (Wire
uid 549,0
shape (OrthoPolyLine
uid 550,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "14000,30000,28250,30000"
pts [
"14000,30000"
"28250,30000"
]
)
start &57
end &28
sat 32
eat 32
sty 1
stc 0
st 0
si 0
tg (WTG
uid 551,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 552,0
va (VaSet
isHidden 1
)
xt "16000,29000,18200,30000"
st "dbusin"
blo "16000,29800"
tm "WireNameMgr"
)
)
on &62
)
*76 (Wire
uid 559,0
shape (OrthoPolyLine
uid 560,0
va (VaSet
vasetType 3
)
xt "21000,21000,28250,36000"
pts [
"28250,36000"
"21000,36000"
"21000,21000"
]
)
start &32
end &66
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 561,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 562,0
va (VaSet
)
xt "25000,35000,27100,36000"
st "resetn"
blo "25000,35800"
tm "WireNameMgr"
)
)
on &39
)
*77 (Wire
uid 565,0
shape (OrthoPolyLine
uid 566,0
va (VaSet
vasetType 3
)
xt "22000,17000,28250,28000"
pts [
"28250,28000"
"22000,28000"
"22000,17000"
]
)
start &26
end &64
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 567,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 568,0
va (VaSet
)
xt "26000,27000,26900,28000"
st "clk"
blo "26000,27800"
tm "WireNameMgr"
)
)
on &37
)
*78 (Wire
uid 573,0
shape (OrthoPolyLine
uid 574,0
va (VaSet
vasetType 3
)
xt "14000,19000,28250,19000"
pts [
"14000,19000"
"28250,19000"
]
)
start &58
end &14
sat 32
eat 32
stc 0
st 0
si 0
tg (WTG
uid 575,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 576,0
va (VaSet
isHidden 1
)
xt "16000,18000,18300,19000"
st "rxclk16"
blo "16000,18800"
tm "WireNameMgr"
)
)
on &59
)
*79 (Wire
uid 591,0
shape (OrthoPolyLine
uid 592,0
va (VaSet
vasetType 3
)
xt "40750,33000,53000,33000"
pts [
"40750,33000"
"53000,33000"
]
)
start &27
end &61
sat 32
eat 32
stc 0
st 0
si 0
tg (WTG
uid 593,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 594,0
va (VaSet
isHidden 1
)
xt "42750,32000,44150,33000"
st "txclk"
blo "42750,32800"
tm "WireNameMgr"
)
)
on &60
)
]
LanguageMgr "VhdlLangMgr"
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 0
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "26368,26368,26368"
)
packageList *80 (PackageList
uid 42,0
stg "VerticalLayoutStrategy"
textVec [
*81 (Text
uid 43,0
va (VaSet
font "arial,8,1"
)
xt "0,0,5400,1000"
st "Package List"
blo "0,800"
)
*82 (MLText
uid 44,0
va (VaSet
)
xt "0,1000,12400,7000"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;


USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;"
tm "PackageList"
)
]
)
compDirBlock (MlTextGroup
uid 45,0
stg "VerticalLayoutStrategy"
textVec [
*83 (Text
uid 46,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,0,28100,1000"
st "Compiler Directives"
blo "20000,800"
)
*84 (Text
uid 47,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,1000,29600,2000"
st "Pre-module directives:"
blo "20000,1800"
)
*85 (MLText
uid 48,0
va (VaSet
isHidden 1
)
xt "20000,2000,27500,4000"
st "`resetall
`timescale 1ns/10ps"
tm "BdCompilerDirectivesTextMgr"
)
*86 (Text
uid 49,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,4000,30100,5000"
st "Post-module directives:"
blo "20000,4800"
)
*87 (MLText
uid 50,0
va (VaSet
isHidden 1
)
xt "20000,0,20000,0"
tm "BdCompilerDirectivesTextMgr"
)
*88 (Text
uid 51,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,5000,29900,6000"
st "End-module directives:"
blo "20000,5800"
)
*89 (MLText
uid 52,0
va (VaSet
isHidden 1
)
xt "20000,6000,20000,6000"
tm "BdCompilerDirectivesTextMgr"
)
]
associable 1
)
windowSize "-4,-4,1397,1026"
viewArea "-3100,-1100,81096,51042"
cachedDiagramExtent "0,0,73000,49000"
hasePageBreakOrigin 1
pageBreakOrigin "0,0"
lastUid 606,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
)
xt "200,200,1600,1200"
st "
Text
"
tm "CommentText"
wrapOption 3
visibleHeight 4600
visibleWidth 14600
)
)
defaultPanel (Panel
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
font "Arial,8,1"
)
xt "1000,1000,3400,2000"
st "Panel0"
blo "1000,1800"
tm "PanelText"
)
)
)
defaultBlk (Blk
shape (Rectangle
va (VaSet
vasetType 1
fg "39936,56832,65280"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*90 (Text
va (VaSet
font "Arial,8,1"
)
xt "2400,3500,5600,4500"
st "<library>"
blo "2400,4300"
tm "BdLibraryNameMgr"
)
*91 (Text
va (VaSet
font "Arial,8,1"
)
xt "2400,4500,5400,5500"
st "<block>"
blo "2400,5300"
tm "BlkNameMgr"
)