📄 i2c_eeprom.map.rpt
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; Total Number of Removed Registers = 9 ; ;
+---------------------------------------+----------------------------------------+
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 153 ;
; Number of registers using Synchronous Clear ; 18 ;
; Number of registers using Synchronous Load ; 3 ;
; Number of registers using Asynchronous Clear ; 110 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 58 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed) ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------+
; 10:1 ; 4 bits ; 24 LEs ; 8 LEs ; 16 LEs ; Yes ; |I2c_eeprom|i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_buf[6] ;
; 10:1 ; 3 bits ; 18 LEs ; 6 LEs ; 12 LEs ; Yes ; |I2c_eeprom|i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_buf[3] ;
; 4:1 ; 4 bits ; 8 LEs ; 8 LEs ; 0 LEs ; No ; |I2c_eeprom|hc164_driver:inst1|Mux0 ;
; 7:1 ; 8 bits ; 32 LEs ; 16 LEs ; 16 LEs ; No ; |I2c_eeprom|i2c_top:inst|i2c_wr:i2c_wr_inst|sh8in_state.sh8in_bit5~0 ;
; 8:1 ; 2 bits ; 10 LEs ; 4 LEs ; 6 LEs ; No ; |I2c_eeprom|i2c_top:inst|i2c_wr:i2c_wr_inst|head_state.head_begin~0 ;
; 7:1 ; 2 bits ; 8 LEs ; 4 LEs ; 4 LEs ; No ; |I2c_eeprom|i2c_top:inst|i2c_wr:i2c_wr_inst|Selector47 ;
; 11:1 ; 2 bits ; 14 LEs ; 6 LEs ; 8 LEs ; No ; |I2c_eeprom|i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_state.sh8out_bit7~0 ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------+
+-----------------------------------------------------------+
; Parameter Settings for User Entity Instance: i2c_top:inst ;
+----------------+---------+--------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+---------+--------------------------------+
; IDLE ; 0000001 ; Unsigned Binary ;
; WR_BYTE ; 0000010 ; Unsigned Binary ;
; WR_ACK ; 0000100 ; Unsigned Binary ;
; DELAY ; 0001000 ; Unsigned Binary ;
; RD_BYTE ; 0010000 ; Unsigned Binary ;
; RD_ACK ; 0100000 ; Unsigned Binary ;
; SHOW ; 1000000 ; Unsigned Binary ;
+----------------+---------+--------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: i2c_top:inst|i2c_wr:i2c_wr_inst ;
+----------------+-------------+-----------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------------+-----------------------------------------------+
; Idle ; 00000000001 ; Unsigned Binary ;
; Ready ; 00000000010 ; Unsigned Binary ;
; Write_start ; 00000000100 ; Unsigned Binary ;
; Ctrl_write ; 00000001000 ; Unsigned Binary ;
; Addr_write ; 00000010000 ; Unsigned Binary ;
; Data_write ; 00000100000 ; Unsigned Binary ;
; Read_start ; 00001000000 ; Unsigned Binary ;
; Ctrl_read ; 00010000000 ; Unsigned Binary ;
; Data_read ; 00100000000 ; Unsigned Binary ;
; Stop ; 01000000000 ; Unsigned Binary ;
; Ackn ; 10000000000 ; Unsigned Binary ;
; sh8out_bit7 ; 000000001 ; Unsigned Binary ;
; sh8out_bit6 ; 000000010 ; Unsigned Binary ;
; sh8out_bit5 ; 000000100 ; Unsigned Binary ;
; sh8out_bit4 ; 000001000 ; Unsigned Binary ;
; sh8out_bit3 ; 000010000 ; Unsigned Binary ;
; sh8out_bit2 ; 000100000 ; Unsigned Binary ;
; sh8out_bit1 ; 001000000 ; Unsigned Binary ;
; sh8out_bit0 ; 010000000 ; Unsigned Binary ;
; sh8out_end ; 100000000 ; Unsigned Binary ;
; sh8in_begin ; 0000000001 ; Unsigned Binary ;
; sh8in_bit7 ; 0000000010 ; Unsigned Binary ;
; sh8in_bit6 ; 0000000100 ; Unsigned Binary ;
; sh8in_bit5 ; 0000001000 ; Unsigned Binary ;
; sh8in_bit4 ; 0000010000 ; Unsigned Binary ;
; sh8in_bit3 ; 0000100000 ; Unsigned Binary ;
; sh8in_bit2 ; 0001000000 ; Unsigned Binary ;
; sh8in_bit1 ; 0010000000 ; Unsigned Binary ;
; sh8in_bit0 ; 0100000000 ; Unsigned Binary ;
; sh8in_end ; 1000000000 ; Unsigned Binary ;
; head_begin ; 001 ; Unsigned Binary ;
; head_bit ; 010 ; Unsigned Binary ;
; head_end ; 100 ; Unsigned Binary ;
; stop_begin ; 001 ; Unsigned Binary ;
; stop_bit ; 010 ; Unsigned Binary ;
; stop_end ; 100 ; Unsigned Binary ;
; YES ; 1 ; Signed Integer ;
; NO ; 0 ; Signed Integer ;
+----------------+-------------+-----------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 7.1 Build 156 04/30/2007 SJ Full Version
Info: Processing started: Mon Dec 15 16:21:20 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off I2c_eeprom -c I2c_eeprom
Info: Found 1 design units, including 1 entities, in source file I2c_eeprom.bdf
Info: Found entity 1: I2c_eeprom
Info: Elaborating entity "I2c_eeprom" for the top level hierarchy
Warning: Using design file hc164_driver.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
Info: Found entity 1: hc164_driver
Info: Elaborating entity "hc164_driver" for hierarchy "hc164_driver:inst1"
Warning (10227): Verilog HDL Port Declaration warning at i2c_top.v(16): data type declaration for "data_rep" declares packed dimensions but the port declaration declaration does not
Info (10151): Verilog HDL Declaration information at i2c_top.v(27): "data_rep" is declared here
Warning: Using design file i2c_top.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
Info: Found entity 1: i2c_top
Info: Elaborating entity "i2c_top" for hierarchy "i2c_top:inst"
Warning: Using design file i2c_wr.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
Info: Found entity 1: i2c_wr
Info: Elaborating entity "i2c_wr" for hierarchy "i2c_top:inst|i2c_wr:i2c_wr_inst"
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(110): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(111): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(112): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(113): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(127): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(128): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(129): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(130): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(151): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(152): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(153): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(154): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(438): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(439): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(440): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(457): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(458): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(168): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(169): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(354): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(355): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(363): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(364): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(421): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(422): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(210): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(220): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(221): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at i2c_wr.v(222): truncated value with size 32 to match size of target (1)
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