i2c_eeprom.tan.qmsg

VHDL语言写的IIC实现EEPROM

{ "Info" "ITDB_TSU_RESULT" "i2c_top:inst\|i2c_wr:i2c_wr_inst\|data_r\[1\] I2C_sda clk1 1.310 ns register " "Info: tsu for register \"i2c_top:inst\|i2c_wr:i2c_wr_inst\|data_r\[1\]\" (data pin = \"I2C_sda\", clock pin = \"clk1\") is 1.310 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.567 ns + Longest pin register " "Info: + Longest pin to register delay is 8.567 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns I2C_sda 1 PIN PIN_185 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_185; Fanout = 1; PIN Node = 'I2C_sda'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_sda } "NODE_NAME" } } { "I2c_eeprom.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/EEPROM/I2c_eeprom.bdf" { { 208 552 728 224 "I2C_sda" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.954 ns) 0.954 ns I2C_sda~0 2 COMB IOC_X14_Y19_N1 8 " "Info: 2: + IC(0.000 ns) + CELL(0.954 ns) = 0.954 ns; Loc. = IOC_X14_Y19_N1; Fanout = 8; COMB Node = 'I2C_sda~0'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.954 ns" { I2C_sda I2C_sda~0 } "NODE_NAME" } } { "I2c_eeprom.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/EEPROM/I2c_eeprom.bdf" { { 208 552 728 224 "I2C_sda" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(6.881 ns) + CELL(0.624 ns) 8.459 ns i2c_top:inst\|i2c_wr:i2c_wr_inst\|data_r\[1\]~720 3 COMB LCCOMB_X25_Y12_N16 1 " "Info: 3: + IC(6.881 ns) + CELL(0.624 ns) = 8.459 ns; Loc. = LCCOMB_X25_Y12_N16; Fanout = 1; COMB Node = 'i2c_top:inst\|i2c_wr:i2c_wr_inst\|data_r\[1\]~720'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "7.505 ns" { I2C_sda~0 i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1]~720 } "NODE_NAME" } } { "i2c_wr.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_wr.v" 268 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 8.567 ns i2c_top:inst\|i2c_wr:i2c_wr_inst\|data_r\[1\] 4 REG LCFF_X25_Y12_N17 2 " "Info: 4: + IC(0.000 ns) + CELL(0.108 ns) = 8.567 ns; Loc. = LCFF_X25_Y12_N17; Fanout = 2; REG Node = 'i2c_top:inst\|i2c_wr:i2c_wr_inst\|data_r\[1\]'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1]~720 i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1] } "NODE_NAME" } } { "i2c_wr.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_wr.v" 268 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.686 ns ( 19.68 % ) " "Info: Total cell delay = 1.686 ns ( 19.68 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.881 ns ( 80.32 % ) " "Info: Total interconnect delay = 6.881 ns ( 80.32 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "8.567 ns" { I2C_sda I2C_sda~0 i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1]~720 i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1] } "NODE_NAME" } } { "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "8.567 ns" { I2C_sda I2C_sda~0 i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1]~720 i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1] } { 0.000ns 0.000ns 6.881ns 0.000ns } { 0.000ns 0.954ns 0.624ns 0.108ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "i2c_wr.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_wr.v" 268 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk1 destination 7.217 ns - Shortest register " "Info: - Shortest clock path from clock \"clk1\" to destination register is 7.217 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.140 ns) 1.140 ns clk1 1 CLK PIN_23 2 " "Info: 1: + IC(0.000 ns) + CELL(1.140 ns) = 1.140 ns; Loc. = PIN_23; Fanout = 2; CLK Node = 'clk1'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk1 } "NODE_NAME" } } { "I2c_eeprom.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/EEPROM/I2c_eeprom.bdf" { { 208 -48 120 224 "clk1" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.120 ns) + CELL(0.970 ns) 4.230 ns i2c_top:inst\|clk_div 2 REG LCFF_X28_Y11_N17 2 " "Info: 2: + IC(2.120 ns) + CELL(0.970 ns) = 4.230 ns; Loc. = LCFF_X28_Y11_N17; Fanout = 2; REG Node = 'i2c_top:inst\|clk_div'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "3.090 ns" { clk1 i2c_top:inst|clk_div } "NODE_NAME" } } { "i2c_top.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_top.v" 44 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.423 ns) + CELL(0.000 ns) 5.653 ns i2c_top:inst\|clk_div~clkctrl 3 COMB CLKCTRL_G4 115 " "Info: 3: + IC(1.423 ns) + CELL(0.000 ns) = 5.653 ns; Loc. = CLKCTRL_G4; Fanout = 115; COMB Node = 'i2c_top:inst\|clk_div~clkctrl'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.423 ns" { i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl } "NODE_NAME" } } { "i2c_top.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_top.v" 44 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.898 ns) + CELL(0.666 ns) 7.217 ns i2c_top:inst\|i2c_wr:i2c_wr_inst\|data_r\[1\] 4 REG LCFF_X25_Y12_N17 2 " "Info: 4: + IC(0.898 ns) + CELL(0.666 ns) = 7.217 ns; Loc. = LCFF_X25_Y12_N17; Fanout = 2; REG Node = 'i2c_top:inst\|i2c_wr:i2c_wr_inst\|data_r\[1\]'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.564 ns" { i2c_top:inst|clk_div~clkctrl i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1] } "NODE_NAME" } } { "i2c_wr.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_wr.v" 268 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.776 ns ( 38.46 % ) " "Info: Total cell delay = 2.776 ns ( 38.46 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.441 ns ( 61.54 % ) " "Info: Total interconnect delay = 4.441 ns ( 61.54 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "7.217 ns" { clk1 i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1] } "NODE_NAME" } } { "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "7.217 ns" { clk1 clk1~combout i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1] } { 0.000ns 0.000ns 2.120ns 1.423ns 0.898ns } { 0.000ns 1.140ns 0.970ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0}  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "8.567 ns" { I2C_sda I2C_sda~0 i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1]~720 i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1] } "NODE_NAME" } } { "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "8.567 ns" { I2C_sda I2C_sda~0 i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1]~720 i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1] } { 0.000ns 0.000ns 6.881ns 0.000ns } { 0.000ns 0.954ns 0.624ns 0.108ns } "" } } { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "7.217 ns" { clk1 i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1] } "NODE_NAME" } } { "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "7.217 ns" { clk1 clk1~combout i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl i2c_top:inst|i2c_wr:i2c_wr_inst|data_r[1] } { 0.000ns 0.000ns 2.120ns 1.423ns 0.898ns } { 0.000ns 1.140ns 0.970ns 0.000ns 0.666ns } "" } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk1 HC_SI i2c_top:inst\|data_rep\[7\] 22.855 ns register " "Info: tco from clock \"clk1\" to destination pin \"HC_SI\" through register \"i2c_top:inst\|data_rep\[7\]\" is 22.855 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk1 source 7.225 ns + Longest register " "Info: + Longest clock path from clock \"clk1\" to source register is 7.225 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.140 ns) 1.140 ns clk1 1 CLK PIN_23 2 " "Info: 1: + IC(0.000 ns) + CELL(1.140 ns) = 1.140 ns; Loc. = PIN_23; Fanout = 2; CLK Node = 'clk1'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk1 } "NODE_NAME" } } { "I2c_eeprom.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/EEPROM/I2c_eeprom.bdf" { { 208 -48 120 224 "clk1" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.120 ns) + CELL(0.970 ns) 4.230 ns i2c_top:inst\|clk_div 2 REG LCFF_X28_Y11_N17 2 " "Info: 2: + IC(2.120 ns) + CELL(0.970 ns) = 4.230 ns; Loc. = LCFF_X28_Y11_N17; Fanout = 2; REG Node = 'i2c_top:inst\|clk_div'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "3.090 ns" { clk1 i2c_top:inst|clk_div } "NODE_NAME" } } { "i2c_top.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_top.v" 44 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.423 ns) + CELL(0.000 ns) 5.653 ns i2c_top:inst\|clk_div~clkctrl 3 COMB CLKCTRL_G4 115 " "Info: 3: + IC(1.423 ns) + CELL(0.000 ns) = 5.653 ns; Loc. = CLKCTRL_G4; Fanout = 115; COMB Node = 'i2c_top:inst\|clk_div~clkctrl'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.423 ns" { i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl } "NODE_NAME" } } { "i2c_top.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_top.v" 44 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.906 ns) + CELL(0.666 ns) 7.225 ns i2c_top:inst\|data_rep\[7\] 4 REG LCFF_X16_Y12_N13 1 " "Info: 4: + IC(0.906 ns) + CELL(0.666 ns) = 7.225 ns; Loc. = LCFF_X16_Y12_N13; Fanout = 1; REG Node = 'i2c_top:inst\|data_rep\[7\]'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.572 ns" { i2c_top:inst|clk_div~clkctrl i2c_top:inst|data_rep[7] } "NODE_NAME" } } { "i2c_top.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_top.v" 187 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.776 ns ( 38.42 % ) " "Info: Total cell delay = 2.776 ns ( 38.42 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.449 ns ( 61.58 % ) " "Info: Total interconnect delay = 4.449 ns ( 61.58 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "7.225 ns" { clk1 i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl i2c_top:inst|data_rep[7] } "NODE_NAME" } } { "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "7.225 ns" { clk1 clk1~combout i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl i2c_top:inst|data_rep[7] } { 0.000ns 0.000ns 2.120ns 1.423ns 0.906ns } { 0.000ns 1.140ns 0.970ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "i2c_top.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_top.v" 187 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "15.326 ns + Longest register pin " "Info: + Longest register to pin delay is 15.326 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns i2c_top:inst\|data_rep\[7\] 1 REG LCFF_X16_Y12_N13 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X16_Y12_N13; Fanout = 1; REG Node = 'i2c_top:inst\|data_rep\[7\]'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { i2c_top:inst|data_rep[7] } "NODE_NAME" } } { "i2c_top.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_top.v" 187 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.435 ns) + CELL(0.206 ns) 0.641 ns hc164_driver:inst1\|Mux0~21 2 COMB LCCOMB_X16_Y12_N2 1 " "Info: 2: + IC(0.435 ns) + CELL(0.206 ns) = 0.641 ns; Loc. = LCCOMB_X16_Y12_N2; Fanout = 1; COMB Node = 'hc164_driver:inst1\|Mux0~21'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.641 ns" { i2c_top:inst|data_rep[7] hc164_driver:inst1|Mux0~21 } "NODE_NAME" } } { "hc164_driver.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/hc164_driver.v" 100 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.732 ns) + CELL(0.624 ns) 2.997 ns hc164_driver:inst1\|Mux0~22 3 COMB LCCOMB_X25_Y12_N12 7 " "Info: 3: + IC(1.732 ns) + CELL(0.624 ns) = 2.997 ns; Loc. = LCCOMB_X25_Y12_N12; Fanout = 7; COMB Node = 'hc164_driver:inst1\|Mux0~22'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.356 ns" { hc164_driver:inst1|Mux0~21 hc164_driver:inst1|Mux0~22 } "NODE_NAME" } } { "hc164_driver.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/hc164_driver.v" 100 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.784 ns) + CELL(0.624 ns) 5.405 ns hc164_driver:inst1\|WideOr4~23 4 COMB LCCOMB_X16_Y12_N16 1 " "Info: 4: + IC(1.784 ns) + CELL(0.624 ns) = 5.405 ns; Loc. = LCCOMB_X16_Y12_N16; Fanout = 1; COMB Node = 'hc164_driver:inst1\|WideOr4~23'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.408 ns" { hc164_driver:inst1|Mux0~22 hc164_driver:inst1|WideOr4~23 } "NODE_NAME" } } { "hc164_driver.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/hc164_driver.v" 122 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.624 ns) 7.102 ns hc164_driver:inst1\|Mux5~361 5 COMB LCCOMB_X16_Y13_N18 1 " "Info: 5: + IC(1.073 ns) + CELL(0.624 ns) = 7.102 ns; Loc. = LCCOMB_X16_Y13_N18; Fanout = 1; COMB Node = 'hc164_driver:inst1\|Mux5~361'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.697 ns" { hc164_driver:inst1|WideOr4~23 hc164_driver:inst1|Mux5~361 } "NODE_NAME" } } { "hc164_driver.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/hc164_driver.v" 175 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.367 ns) + CELL(0.624 ns) 8.093 ns hc164_driver:inst1\|Mux5~362 6 COMB LCCOMB_X16_Y13_N30 1 " "Info: 6: + IC(0.367 ns) + CELL(0.624 ns) = 8.093 ns; Loc. = LCCOMB_X16_Y13_N30; Fanout = 1; COMB Node = 'hc164_driver:inst1\|Mux5~362'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.991 ns" { hc164_driver:inst1|Mux5~361 hc164_driver:inst1|Mux5~362 } "NODE_NAME" } } { "hc164_driver.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/hc164_driver.v" 175 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.365 ns) + CELL(0.206 ns) 8.664 ns hc164_driver:inst1\|Mux5~364 7 COMB LCCOMB_X16_Y13_N22 1 " "Info: 7: + IC(0.365 ns) + CELL(0.206 ns) = 8.664 ns; Loc. = LCCOMB_X16_Y13_N22; Fanout = 1; COMB Node = 'hc164_driver:inst1\|Mux5~364'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.571 ns" { hc164_driver:inst1|Mux5~362 hc164_driver:inst1|Mux5~364 } "NODE_NAME" } } { "hc164_driver.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/hc164_driver.v" 175 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.362 ns) + CELL(0.206 ns) 9.232 ns hc164_driver:inst1\|Mux5~367 8 COMB LCCOMB_X16_Y13_N0 1 " "Info: 8: + IC(0.362 ns) + CELL(0.206 ns) = 9.232 ns; Loc. = LCCOMB_X16_Y13_N0; Fanout = 1; COMB Node = 'hc164_driver:inst1\|Mux5~367'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.568 ns" { hc164_driver:inst1|Mux5~364 hc164_driver:inst1|Mux5~367 } "NODE_NAME" } } { "hc164_driver.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/hc164_driver.v" 175 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.824 ns) + CELL(3.270 ns) 15.326 ns HC_SI 9 PIN PIN_152 0 " "Info: 9: + IC(2.824 ns) + CELL(3.270 ns) = 15.326 ns; Loc. = PIN_152; Fanout = 0; PIN Node = 'HC_SI'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "6.094 ns" { hc164_driver:inst1|Mux5~367 HC_SI } "NODE_NAME" } } { "I2c_eeprom.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/EEPROM/I2c_eeprom.bdf" { { 312 1056 1232 328 "HC_SI" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.384 ns ( 41.65 % ) " "Info: Total cell delay = 6.384 ns ( 41.65 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.942 ns ( 58.35 % ) " "Info: Total interconnect delay = 8.942 ns ( 58.35 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "15.326 ns" { i2c_top:inst|data_rep[7] hc164_driver:inst1|Mux0~21 hc164_driver:inst1|Mux0~22 hc164_driver:inst1|WideOr4~23 hc164_driver:inst1|Mux5~361 hc164_driver:inst1|Mux5~362 hc164_driver:inst1|Mux5~364 hc164_driver:inst1|Mux5~367 HC_SI } "NODE_NAME" } } { "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "15.326 ns" { i2c_top:inst|data_rep[7] hc164_driver:inst1|Mux0~21 hc164_driver:inst1|Mux0~22 hc164_driver:inst1|WideOr4~23 hc164_driver:inst1|Mux5~361 hc164_driver:inst1|Mux5~362 hc164_driver:inst1|Mux5~364 hc164_driver:inst1|Mux5~367 HC_SI } { 0.000ns 0.435ns 1.732ns 1.784ns 1.073ns 0.367ns 0.365ns 0.362ns 2.824ns } { 0.000ns 0.206ns 0.624ns 0.624ns 0.624ns 0.624ns 0.206ns 0.206ns 3.270ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0}  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "7.225 ns" { clk1 i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl i2c_top:inst|data_rep[7] } "NODE_NAME" } } { "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "7.225 ns" { clk1 clk1~combout i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl i2c_top:inst|data_rep[7] } { 0.000ns 0.000ns 2.120ns 1.423ns 0.906ns } { 0.000ns 1.140ns 0.970ns 0.000ns 0.666ns } "" } } { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "15.326 ns" { i2c_top:inst|data_rep[7] hc164_driver:inst1|Mux0~21 hc164_driver:inst1|Mux0~22 hc164_driver:inst1|WideOr4~23 hc164_driver:inst1|Mux5~361 hc164_driver:inst1|Mux5~362 hc164_driver:inst1|Mux5~364 hc164_driver:inst1|Mux5~367 HC_SI } "NODE_NAME" } } { "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "15.326 ns" { i2c_top:inst|data_rep[7] hc164_driver:inst1|Mux0~21 hc164_driver:inst1|Mux0~22 hc164_driver:inst1|WideOr4~23 hc164_driver:inst1|Mux5~361 hc164_driver:inst1|Mux5~362 hc164_driver:inst1|Mux5~364 hc164_driver:inst1|Mux5~367 HC_SI } { 0.000ns 0.435ns 1.732ns 1.784ns 1.073ns 0.367ns 0.365ns 0.362ns 2.824ns } { 0.000ns 0.206ns 0.624ns 0.624ns 0.624ns 0.624ns 0.206ns 0.206ns 3.270ns } "" } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0 "" 0}
{ "Info" "ITDB_TH_RESULT" "i2c_top:inst\|i2c_wr:i2c_wr_inst\|sh8out_state.sh8out_bit0 pld_CLEAR_n clk1 3.445 ns register " "Info: th for register \"i2c_top:inst\|i2c_wr:i2c_wr_inst\|sh8out_state.sh8out_bit0\" (data pin = \"pld_CLEAR_n\", clock pin = \"clk1\") is 3.445 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk1 destination 7.221 ns + Longest register " "Info: + Longest clock path from clock \"clk1\" to destination register is 7.221 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.140 ns) 1.140 ns clk1 1 CLK PIN_23 2 " "Info: 1: + IC(0.000 ns) + CELL(1.140 ns) = 1.140 ns; Loc. = PIN_23; Fanout = 2; CLK Node = 'clk1'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk1 } "NODE_NAME" } } { "I2c_eeprom.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/EEPROM/I2c_eeprom.bdf" { { 208 -48 120 224 "clk1" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.120 ns) + CELL(0.970 ns) 4.230 ns i2c_top:inst\|clk_div 2 REG LCFF_X28_Y11_N17 2 " "Info: 2: + IC(2.120 ns) + CELL(0.970 ns) = 4.230 ns; Loc. = LCFF_X28_Y11_N17; Fanout = 2; REG Node = 'i2c_top:inst\|clk_div'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "3.090 ns" { clk1 i2c_top:inst|clk_div } "NODE_NAME" } } { "i2c_top.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_top.v" 44 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.423 ns) + CELL(0.000 ns) 5.653 ns i2c_top:inst\|clk_div~clkctrl 3 COMB CLKCTRL_G4 115 " "Info: 3: + IC(1.423 ns) + CELL(0.000 ns) = 5.653 ns; Loc. = CLKCTRL_G4; Fanout = 115; COMB Node = 'i2c_top:inst\|clk_div~clkctrl'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.423 ns" { i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl } "NODE_NAME" } } { "i2c_top.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_top.v" 44 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.902 ns) + CELL(0.666 ns) 7.221 ns i2c_top:inst\|i2c_wr:i2c_wr_inst\|sh8out_state.sh8out_bit0 4 REG LCFF_X21_Y13_N17 4 " "Info: 4: + IC(0.902 ns) + CELL(0.666 ns) = 7.221 ns; Loc. = LCFF_X21_Y13_N17; Fanout = 4; REG Node = 'i2c_top:inst\|i2c_wr:i2c_wr_inst\|sh8out_state.sh8out_bit0'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "1.568 ns" { i2c_top:inst|clk_div~clkctrl i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_state.sh8out_bit0 } "NODE_NAME" } } { "i2c_wr.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_wr.v" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.776 ns ( 38.44 % ) " "Info: Total cell delay = 2.776 ns ( 38.44 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.445 ns ( 61.56 % ) " "Info: Total interconnect delay = 4.445 ns ( 61.56 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "7.221 ns" { clk1 i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_state.sh8out_bit0 } "NODE_NAME" } } { "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "7.221 ns" { clk1 clk1~combout i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_state.sh8out_bit0 } { 0.000ns 0.000ns 2.120ns 1.423ns 0.902ns } { 0.000ns 1.140ns 0.970ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TH_DELAY" "0.306 ns + " "Info: + Micro hold delay of destination is 0.306 ns" {  } { { "i2c_wr.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_wr.v" 30 -1 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.082 ns - Shortest pin register " "Info: - Shortest pin to register delay is 4.082 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns pld_CLEAR_n 1 PIN PIN_24 21 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_24; Fanout = 21; PIN Node = 'pld_CLEAR_n'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { pld_CLEAR_n } "NODE_NAME" } } { "I2c_eeprom.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/EEPROM/I2c_eeprom.bdf" { { 224 -48 120 240 "pld_CLEAR_n" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.097 ns) + CELL(0.855 ns) 4.082 ns i2c_top:inst\|i2c_wr:i2c_wr_inst\|sh8out_state.sh8out_bit0 2 REG LCFF_X21_Y13_N17 4 " "Info: 2: + IC(2.097 ns) + CELL(0.855 ns) = 4.082 ns; Loc. = LCFF_X21_Y13_N17; Fanout = 4; REG Node = 'i2c_top:inst\|i2c_wr:i2c_wr_inst\|sh8out_state.sh8out_bit0'" {  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "2.952 ns" { pld_CLEAR_n i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_state.sh8out_bit0 } "NODE_NAME" } } { "i2c_wr.v" "" { Text "C:/Documents and Settings/Administrator/桌面/EEPROM/i2c_wr.v" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.985 ns ( 48.63 % ) " "Info: Total cell delay = 1.985 ns ( 48.63 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.097 ns ( 51.37 % ) " "Info: Total interconnect delay = 2.097 ns ( 51.37 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "4.082 ns" { pld_CLEAR_n i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_state.sh8out_bit0 } "NODE_NAME" } } { "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "4.082 ns" { pld_CLEAR_n pld_CLEAR_n~combout i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_state.sh8out_bit0 } { 0.000ns 0.000ns 2.097ns } { 0.000ns 1.130ns 0.855ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0}  } { { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "7.221 ns" { clk1 i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_state.sh8out_bit0 } "NODE_NAME" } } { "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "7.221 ns" { clk1 clk1~combout i2c_top:inst|clk_div i2c_top:inst|clk_div~clkctrl i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_state.sh8out_bit0 } { 0.000ns 0.000ns 2.120ns 1.423ns 0.902ns } { 0.000ns 1.140ns 0.970ns 0.000ns 0.666ns } "" } } { "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "4.082 ns" { pld_CLEAR_n i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_state.sh8out_bit0 } "NODE_NAME" } } { "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/71/quartus/bin/Technology_Viewer.qrui" "4.082 ns" { pld_CLEAR_n pld_CLEAR_n~combout i2c_top:inst|i2c_wr:i2c_wr_inst|sh8out_state.sh8out_bit0 } { 0.000ns 0.000ns 2.097ns } { 0.000ns 1.130ns 0.855ns } "" } }  } 0 0 "th for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0}