glm.qsf

IO设备vhdl语言1234556778892341

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		glm_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C35F672C8
set_global_assignment -name TOP_LEVEL_ENTITY glm
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:14:03  OCTOBER 19, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 7.2
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 672
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_location_assignment PIN_B22 -to DATA_IN[3]
set_location_assignment PIN_B21 -to DATA_IN[2]
set_location_assignment PIN_A21 -to DATA_IN[1]
set_location_assignment PIN_F6 -to DATA_IN[0]
set_location_assignment PIN_AB18 -to DATAOUT[3]
set_location_assignment PIN_V17 -to DATAOUT[2]
set_location_assignment PIN_W17 -to DATAOUT[1]
set_location_assignment PIN_AA18 -to DATAOUT[0]
set_location_assignment PIN_AA16 -to EN
set_global_assignment -name VHDL_FILE glm.vhd
set_global_assignment -name BDF_FILE Block1.bdf
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_location_assignment PIN_AC10 -to LEDOUT[3]
set_location_assignment PIN_W11 -to LEDOUT[2]
set_location_assignment PIN_W12 -to LEDOUT[1]
set_location_assignment PIN_AE8 -to LEDOUT[0]