clock.hif

基于VHDL的电子时钟设计

Version 8.0 Build 215 05/29/2008 SJ Full Version
39
2602
OFF
OFF
OFF
OFF
ON
ON
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
counter10
# storage
db|clock.(0).cnf
db|clock.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
counter10.vhd
901577d1c4b4bc8e1b5d1a1a24c873c
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
counter10:u1
counter10:u3
}
# lmf
d:|quartus|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
counter6
# storage
db|clock.(1).cnf
db|clock.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
counter6.vhd
44794f550339aafb53bc1e8d9762923
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
counter6:u2
counter6:u4
}
# lmf
d:|quartus|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
counter24
# storage
db|clock.(2).cnf
db|clock.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
counter24.vhd
158bab75e9fcbf623fbb8eefa63acf72
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
counter24:u5
}
# lmf
d:|quartus|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
decoder
# storage
db|clock.(3).cnf
db|clock.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
decoder.vhd
726cfb1cc980573ad65a5be03a7efc9d
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
decoder:u6
decoder:u7
decoder:u8
decoder:u9
decoder:u10
decoder:u11
}
# lmf
d:|quartus|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
clock
# storage
db|clock.(4).cnf
db|clock.(4).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
clock.vhd
772b164792ddc718b21378c8dc4549
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
|
}
# lmf
d:|quartus|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# complete