adc0809.map.summary

用CPLD/FPGA驱动ADC0809芯片的VHDL源程序

Analysis & Synthesis Status : Successful - Mon Nov 24 00:10:29 2008
Quartus II Version : 8.0 Build 215 05/29/2008 SJ Full Version
Revision Name : adc0809
Top-level Entity Name : ADC0809
Family : MAX II
Total logic elements : 28
Total pins : 28
Total virtual pins : 0
Total memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0