dcnt10.vhd

来自「eda微波炉程序控制器 初学vhdl语言的控制程序设计」· VHDL 代码 · 共 42 行

--DCNT10.VHD
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY DCNT10 IS
  PORT(CLK:IN STD_LOGIC;
        LOAD:IN STD_LOGIC;
        ENA: IN STD_LOGIC;
        DATAIN:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
        CQ:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
        CARRY_OUT: OUT STD_LOGIC );
END ENTITY DCNT10;
ARCHITECTURE ART OF DCNT10 IS
  SIGNAL CQI:STD_LOGIC_VECTOR(3 DOWNTO 0);
  BEGIN
  PROCESS(CLK,LOAD,ENA) IS
	BEGIN
	IF LOAD='1' THEN
	CQI<=DATAIN;
	ELSIF CLK'EVENT AND CLK='1' THEN
	IF ENA='1' THEN
         IF CQI="0000" THEN CQI<="1001";
         ELSE CQI<=CQI-'1';
         END IF;
	END IF;
	END IF;
  END PROCESS;
  PROCESS(CLK,CQI) IS
	BEGIN
	IF CLK'EVENT AND CLK='1' THEN
	IF CQI="0000" THEN
	 CARRY_OUT<='1';
	ELSE 
	CARRY_OUT<='0';
	END IF;
   END IF;
  END PROCESS;
  CQ<=CQI;
END ARCHITECTURE ART;