moore.fit.rpt

来自「moore状态机用VHDL语言进行实现」· RPT 代码 · 共 655 行 · 第 1/4 页

Note: User assignments will override these defaults. The user specified values are listed in the Output Pins and Bidir Pins tables.


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Resource Utilization by Entity                                                                                                                                                                                ;
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+--------------+
; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; UFM Blocks ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name ; Library Name ;
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+--------------+
; |moore                     ; 6 (6)       ; 4            ; 0          ; 6    ; 0            ; 2 (2)        ; 0 (0)             ; 4 (4)            ; 0 (0)           ; 0 (0)      ; |moore              ; work         ;
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+---------------------------------------+
; Delay Chain Summary                   ;
+------------+----------+---------------+
; Name       ; Pin Type ; Pad to Core 0 ;
+------------+----------+---------------+
; read_write ; Input    ; 0             ;
; ready      ; Input    ; 0             ;
; clk        ; Input    ; 0             ;
; reset      ; Input    ; 0             ;
; oe         ; Output   ; --            ;
; we         ; Output   ; --            ;
+------------+----------+---------------+


+----------------------------------------------------------------------------------------------+
; Control Signals                                                                              ;
+-------+----------+---------+--------------+--------+----------------------+------------------+
; Name  ; Location ; Fan-Out ; Usage        ; Global ; Global Resource Used ; Global Line Name ;
+-------+----------+---------+--------------+--------+----------------------+------------------+
; clk   ; PIN_14   ; 4       ; Clock        ; yes    ; Global Clock         ; GCLK1            ;
; reset ; PIN_12   ; 4       ; Async. clear ; yes    ; Global Clock         ; GCLK0            ;
+-------+----------+---------+--------------+--------+----------------------+------------------+


+----------------------------------------------------------------------+
; Global & Other Fast Signals                                          ;
+-------+----------+---------+----------------------+------------------+
; Name  ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ;
+-------+----------+---------+----------------------+------------------+
; clk   ; PIN_14   ; 4       ; Global Clock         ; GCLK1            ;
; reset ; PIN_12   ; 4       ; Global Clock         ; GCLK0            ;
+-------+----------+---------+----------------------+------------------+


+----------------------------------+
; Non-Global High Fan-Out Signals  ;
+------------------------+---------+
; Name                   ; Fan-Out ;
+------------------------+---------+
; ready                  ; 4       ;
; present_state.idle     ; 4       ;
; present_state.write    ; 3       ;
; present_state.read     ; 3       ;
; read_write             ; 2       ;
; present_state.decision ; 2       ;
; we~0                   ; 1       ;
; oe~0                   ; 1       ;
+------------------------+---------+


+------------------------------------------------+
; Interconnect Usage Summary                     ;
+----------------------------+-------------------+
; Interconnect Resource Type ; Usage             ;
+----------------------------+-------------------+
; C4s                        ; 2 / 784 ( < 1 % ) ;
; Direct links               ; 0 / 888 ( 0 % )   ;
; Global clocks              ; 2 / 4 ( 50 % )    ;
; LAB clocks                 ; 2 / 32 ( 6 % )    ;
; LUT chains                 ; 0 / 216 ( 0 % )   ;
; Local interconnects        ; 5 / 888 ( < 1 % ) ;
; R4s                        ; 9 / 704 ( 1 % )   ;
+----------------------------+-------------------+


+--------------------------------------------------------------------------+
; LAB Logic Elements                                                       ;
+--------------------------------------------+-----------------------------+
; Number of Logic Elements  (Average = 6.00) ; Number of LABs  (Total = 1) ;
+--------------------------------------------+-----------------------------+
; 1                                          ; 0                           ;
; 2                                          ; 0                           ;
; 3                                          ; 0                           ;
; 4                                          ; 0                           ;
; 5                                          ; 0                           ;
; 6                                          ; 1                           ;
; 7                                          ; 0                           ;
; 8                                          ; 0                           ;
; 9                                          ; 0                           ;
; 10                                         ; 0                           ;
+--------------------------------------------+-----------------------------+


+------------------------------------------------------------------+
; LAB-wide Signals                                                 ;
+------------------------------------+-----------------------------+
; LAB-wide Signals  (Average = 2.00) ; Number of LABs  (Total = 1) ;
+------------------------------------+-----------------------------+
; 1 Async. clear                     ; 1                           ;
; 1 Clock                            ; 1                           ;
+------------------------------------+-----------------------------+


+---------------------------------------------------------------------------+
; LAB Signals Sourced                                                       ;
+---------------------------------------------+-----------------------------+
; Number of Signals Sourced  (Average = 6.00) ; Number of LABs  (Total = 1) ;
+---------------------------------------------+-----------------------------+
; 0                                           ; 0                           ;
; 1                                           ; 0                           ;
; 2                                           ; 0                           ;
; 3                                           ; 0                           ;
; 4                                           ; 0                           ;
; 5                                           ; 0                           ;
; 6                                           ; 1                           ;
+---------------------------------------------+-----------------------------+


+-------------------------------------------------------------------------------+
; LAB Signals Sourced Out                                                       ;
+-------------------------------------------------+-----------------------------+
; Number of Signals Sourced Out  (Average = 2.00) ; Number of LABs  (Total = 1) ;
+-------------------------------------------------+-----------------------------+
; 0                                               ; 0                           ;
; 1                                               ; 0                           ;
; 2                                               ; 1                           ;
+-------------------------------------------------+-----------------------------+


+---------------------------------------------------------------------------+
; LAB Distinct Inputs                                                       ;
+---------------------------------------------+-----------------------------+
; Number of Distinct Inputs  (Average = 4.00) ; Number of LABs  (Total = 1) ;
+---------------------------------------------+-----------------------------+
; 0                                           ; 0                           ;
; 1                                           ; 0                           ;
; 2                                           ; 0                           ;
; 3                                           ; 0                           ;
; 4                                           ; 1                           ;
+---------------------------------------------+-----------------------------+


+-------------------------------------------------------------------------+
; Fitter Device Options                                                   ;
+----------------------------------------------+--------------------------+
; Option                                       ; Setting                  ;
+----------------------------------------------+--------------------------+
; Enable user-supplied start-up clock (CLKUSR) ; Off                      ;
; Enable device-wide reset (DEV_CLRn)          ; Off                      ;
; Enable device-wide output enable (DEV_OE)    ; Off                      ;
; Enable INIT_DONE output                      ; Off                      ;
; Configuration scheme                         ; Passive Serial           ;
; Reserve all unused pins                      ; As output driving ground ;
; Base pin-out file on sameframe device        ; Off                      ;
+----------------------------------------------+--------------------------+


+----------------------------+
; Advanced Data - General    ;
+--------------------+-------+
; Name               ; Value ;