de2_ltm_ephoto.fit.rpt

友晶科技提供的电子相册源代码

; Family                             ; Cyclone II                                    ;
; Device                             ; EP2C35F672C6                                  ;
; Timing Models                      ; Final                                         ;
; Total logic elements               ; 2,646 / 33,216 ( 8 % )                        ;
;     Total combinational functions  ; 1,772 / 33,216 ( 5 % )                        ;
;     Dedicated logic registers      ; 2,136 / 33,216 ( 6 % )                        ;
; Total registers                    ; 2136                                          ;
; Total pins                         ; 429 / 475 ( 90 % )                            ;
; Total virtual pins                 ; 0                                             ;
; Total memory bits                  ; 160,768 / 483,840 ( 33 % )                    ;
; Embedded Multiplier 9-bit elements ; 6 / 70 ( 9 % )                                ;
; Total PLLs                         ; 1 / 4 ( 25 % )                                ;
+------------------------------------+-----------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Settings                                                                                                                         ;
+-----------------------------------------------------------------------+--------------------------------+--------------------------------+
; Option                                                                ; Setting                        ; Default Value                  ;
+-----------------------------------------------------------------------+--------------------------------+--------------------------------+
; Device                                                                ; EP2C35F672C6                   ;                                ;
; Fit Attempts to Skip                                                  ; 0                              ; 0.0                            ;
; Always Enable Input Buffers                                           ; Off                            ; Off                            ;
; Router Timing Optimization Level                                      ; Normal                         ; Normal                         ;
; Placement Effort Multiplier                                           ; 1.0                            ; 1.0                            ;
; Router Effort Multiplier                                              ; 1.0                            ; 1.0                            ;
; Optimize Hold Timing                                                  ; IO Paths and Minimum TPD Paths ; IO Paths and Minimum TPD Paths ;
; Optimize Fast-Corner Timing                                           ; Off                            ; Off                            ;
; PowerPlay Power Optimization                                          ; Normal compilation             ; Normal compilation             ;
; Optimize Timing                                                       ; Normal compilation             ; Normal compilation             ;
; Optimize IOC Register Placement for Timing                            ; On                             ; On                             ;
; Limit to One Fitting Attempt                                          ; Off                            ; Off                            ;
; Final Placement Optimizations                                         ; Automatically                  ; Automatically                  ;
; Fitter Aggressive Routability Optimizations                           ; Automatically                  ; Automatically                  ;
; Fitter Initial Placement Seed                                         ; 1                              ; 1                              ;
; PCI I/O                                                               ; Off                            ; Off                            ;
; Weak Pull-Up Resistor                                                 ; Off                            ; Off                            ;
; Enable Bus-Hold Circuitry                                             ; Off                            ; Off                            ;
; Auto Global Memory Control Signals                                    ; Off                            ; Off                            ;
; Auto Packed Registers -- Stratix II/II GX/III Cyclone II/III Arria GX ; Auto                           ; Auto                           ;
; Auto Delay Chains                                                     ; On                             ; On                             ;
; Auto Merge PLLs                                                       ; On                             ; On                             ;
; Ignore PLL Mode When Merging PLLs                                     ; Off                            ; Off                            ;
; Perform Physical Synthesis for Combinational Logic for Fitting        ; Off                            ; Off                            ;
; Perform Physical Synthesis for Combinational Logic for Performance    ; Off                            ; Off                            ;
; Perform Register Duplication for Performance                          ; Off                            ; Off                            ;
; Perform Logic to Memory Mapping for Fitting                           ; Off                            ; Off                            ;
; Perform Register Retiming for Performance                             ; Off                            ; Off                            ;
; Perform Asynchronous Signal Pipelining                                ; Off                            ; Off                            ;
; Fitter Effort                                                         ; Auto Fit                       ; Auto Fit                       ;
; Physical Synthesis Effort Level                                       ; Normal                         ; Normal                         ;
; Auto Global Clock                                                     ; On                             ; On                             ;
; Auto Global Register Control Signals                                  ; On                             ; On                             ;
; Stop After Congestion Map Generation                                  ; Off                            ; Off                            ;
; Save Intermediate Fitting Results                                     ; Off                            ; Off                            ;
; Use smart compilation                                                 ; Off                            ; Off                            ;
+-----------------------------------------------------------------------+--------------------------------+--------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Netlist Optimizations                                                                                                                                                                                                 ;
+---------------------------------------------------+-----------------+------------------+---------------------+-----------+--------------------------------------------------------------------------------+------------------+
; Node                                              ; Action          ; Operation        ; Reason              ; Node Port ; Destination Node                                                               ; Destination Port ;
+---------------------------------------------------+-----------------+------------------+---------------------+-----------+--------------------------------------------------------------------------------+------------------+
; touch_point_detector:u3|photo_cnt[0]              ; Packed Register ; Register Packing ; Timing optimization ; REGOUT    ; flash_to_sdram_controller:u4|lpm_mult:Mult1|mult_5111:auto_generated|mac_mult1 ; DATAB            ;
; touch_point_detector:u3|photo_cnt[0]              ; Duplicated      ; Register Packing ; Timing optimization ; REGOUT    ; touch_point_detector:u3|photo_cnt[0]~_Duplicate_1                              ; REGOUT           ;
; touch_point_detector:u3|photo_cnt[0]~_Duplicate_1 ; Packed Register ; Register Packing ; Timing optimization ; REGOUT    ; flash_to_sdram_controller:u4|lpm_mult:Mult1|mult_5111:auto_generated|mac_mult3 ; DATAB            ;
; touch_point_detector:u3|photo_cnt[0]~_Duplicate_1 ; Duplicated      ; Register Packing ; Timing optimization ; REGOUT    ; touch_point_detector:u3|photo_cnt[0]~_Duplicate_2                              ; REGOUT           ;
; touch_point_detector:u3|photo_cnt[1]              ; Packed Register ; Register Packing ; Timing optimization ; REGOUT    ; flash_to_sdram_controller:u4|lpm_mult:Mult1|mult_5111:auto_generated|mac_mult1 ; DATAB            ;
; touch_point_detector:u3|photo_cnt[1]              ; Duplicated      ; Register Packing ; Timing optimization ; REGOUT    ; touch_point_detector:u3|photo_cnt[1]~_Duplicate_1                              ; REGOUT           ;
; touch_point_detector:u3|photo_cnt[1]~_Duplicate_1 ; Packed Register ; Register Packing ; Timing optimization ; REGOUT    ; flash_to_sdram_controller:u4|lpm_mult:Mult1|mult_5111:auto_generated|mac_mult3 ; DATAB            ;
; touch_point_detector:u3|photo_cnt[1]~_Duplicate_1 ; Duplicated      ; Register Packing ; Timing optimization ; REGOUT    ; touch_point_detector:u3|photo_cnt[1]~_Duplicate_2                              ; REGOUT           ;
; touch_point_detector:u3|photo_cnt[2]              ; Packed Register ; Register Packing ; Timing optimization ; REGOUT    ; flash_to_sdram_controller:u4|lpm_mult:Mult1|mult_5111:auto_generated|mac_mult1 ; DATAB            ;
; touch_point_detector:u3|photo_cnt[2]              ; Duplicated      ; Register Packing ; Timing optimization ; REGOUT    ; touch_point_detector:u3|photo_cnt[2]~_Duplicate_1                              ; REGOUT           ;