de2_ltm_ephoto.jdi

友晶科技提供的电子相册源代码

        <port name="acq_data_in[56]" source="flash_to_sdram_controller:u4|flash_addr_o[9]"/>
        <port name="acq_clk" source="flash_to_sdram_controller:u4|iF_CLK"/>
        <port name="acq_trigger_in[57]" source="flash_to_sdram_controller:u4|iPHOTO_NUM[0]"/>
        <port name="acq_data_in[57]" source="flash_to_sdram_controller:u4|iPHOTO_NUM[0]"/>
        <port name="acq_trigger_in[58]" source="flash_to_sdram_controller:u4|iPHOTO_NUM[1]"/>
        <port name="acq_data_in[58]" source="flash_to_sdram_controller:u4|iPHOTO_NUM[1]"/>
        <port name="acq_trigger_in[59]" source="flash_to_sdram_controller:u4|iPHOTO_NUM[2]"/>
        <port name="acq_data_in[59]" source="flash_to_sdram_controller:u4|iPHOTO_NUM[2]"/>
        <port name="acq_trigger_in[60]" source="flash_to_sdram_controller:u4|iPHOTO_NUM[3]"/>
        <port name="acq_data_in[60]" source="flash_to_sdram_controller:u4|iPHOTO_NUM[3]"/>
        <port name="acq_trigger_in[61]" source="flash_to_sdram_controller:u4|oBLUE[0]"/>
        <port name="acq_data_in[61]" source="flash_to_sdram_controller:u4|oBLUE[0]"/>
        <port name="acq_trigger_in[62]" source="flash_to_sdram_controller:u4|oBLUE[1]"/>
        <port name="acq_data_in[62]" source="flash_to_sdram_controller:u4|oBLUE[1]"/>
        <port name="acq_trigger_in[63]" source="flash_to_sdram_controller:u4|oBLUE[2]"/>
        <port name="acq_data_in[63]" source="flash_to_sdram_controller:u4|oBLUE[2]"/>
        <port name="acq_trigger_in[64]" source="flash_to_sdram_controller:u4|oBLUE[3]"/>
        <port name="acq_data_in[64]" source="flash_to_sdram_controller:u4|oBLUE[3]"/>
        <port name="acq_trigger_in[65]" source="flash_to_sdram_controller:u4|oBLUE[4]"/>
        <port name="acq_data_in[65]" source="flash_to_sdram_controller:u4|oBLUE[4]"/>
        <port name="acq_trigger_in[66]" source="flash_to_sdram_controller:u4|oBLUE[5]"/>
        <port name="acq_data_in[66]" source="flash_to_sdram_controller:u4|oBLUE[5]"/>
        <port name="acq_trigger_in[67]" source="flash_to_sdram_controller:u4|oBLUE[6]"/>
        <port name="acq_data_in[67]" source="flash_to_sdram_controller:u4|oBLUE[6]"/>
        <port name="acq_trigger_in[68]" source="flash_to_sdram_controller:u4|oBLUE[7]"/>
        <port name="acq_data_in[68]" source="flash_to_sdram_controller:u4|oBLUE[7]"/>
        <port name="acq_trigger_in[69]" source="flash_to_sdram_controller:u4|oFL_ADDR[0]"/>
        <port name="acq_data_in[69]" source="flash_to_sdram_controller:u4|oFL_ADDR[0]"/>
        <port name="acq_trigger_in[70]" source="flash_to_sdram_controller:u4|oFL_ADDR[10]"/>
        <port name="acq_data_in[70]" source="flash_to_sdram_controller:u4|oFL_ADDR[10]"/>
        <port name="acq_trigger_in[71]" source="flash_to_sdram_controller:u4|oFL_ADDR[11]"/>
        <port name="acq_data_in[71]" source="flash_to_sdram_controller:u4|oFL_ADDR[11]"/>
        <port name="acq_trigger_in[72]" source="flash_to_sdram_controller:u4|oFL_ADDR[12]"/>
        <port name="acq_data_in[72]" source="flash_to_sdram_controller:u4|oFL_ADDR[12]"/>
        <port name="acq_trigger_in[73]" source="flash_to_sdram_controller:u4|oFL_ADDR[13]"/>
        <port name="acq_data_in[73]" source="flash_to_sdram_controller:u4|oFL_ADDR[13]"/>
        <port name="acq_trigger_in[74]" source="flash_to_sdram_controller:u4|oFL_ADDR[14]"/>
        <port name="acq_data_in[74]" source="flash_to_sdram_controller:u4|oFL_ADDR[14]"/>
        <port name="acq_trigger_in[75]" source="flash_to_sdram_controller:u4|oFL_ADDR[15]"/>
        <port name="acq_data_in[75]" source="flash_to_sdram_controller:u4|oFL_ADDR[15]"/>
        <port name="acq_trigger_in[76]" source="flash_to_sdram_controller:u4|oFL_ADDR[16]"/>
        <port name="acq_data_in[76]" source="flash_to_sdram_controller:u4|oFL_ADDR[16]"/>
        <port name="acq_trigger_in[77]" source="flash_to_sdram_controller:u4|oFL_ADDR[17]"/>
        <port name="acq_data_in[77]" source="flash_to_sdram_controller:u4|oFL_ADDR[17]"/>
        <port name="acq_trigger_in[78]" source="flash_to_sdram_controller:u4|oFL_ADDR[18]"/>
        <port name="acq_data_in[78]" source="flash_to_sdram_controller:u4|oFL_ADDR[18]"/>
        <port name="acq_trigger_in[79]" source="flash_to_sdram_controller:u4|oFL_ADDR[19]"/>
        <port name="acq_data_in[79]" source="flash_to_sdram_controller:u4|oFL_ADDR[19]"/>
        <port name="acq_trigger_in[80]" source="flash_to_sdram_controller:u4|oFL_ADDR[1]"/>
        <port name="acq_data_in[80]" source="flash_to_sdram_controller:u4|oFL_ADDR[1]"/>
        <port name="acq_trigger_in[81]" source="flash_to_sdram_controller:u4|oFL_ADDR[20]"/>
        <port name="acq_data_in[81]" source="flash_to_sdram_controller:u4|oFL_ADDR[20]"/>
        <port name="acq_trigger_in[82]" source="flash_to_sdram_controller:u4|oFL_ADDR[21]"/>
        <port name="acq_data_in[82]" source="flash_to_sdram_controller:u4|oFL_ADDR[21]"/>
        <port name="acq_trigger_in[83]" source="flash_to_sdram_controller:u4|oFL_ADDR[22]"/>
        <port name="acq_data_in[83]" source="flash_to_sdram_controller:u4|oFL_ADDR[22]"/>
        <port name="acq_trigger_in[84]" source="flash_to_sdram_controller:u4|oFL_ADDR[2]"/>
        <port name="acq_data_in[84]" source="flash_to_sdram_controller:u4|oFL_ADDR[2]"/>
        <port name="acq_trigger_in[85]" source="flash_to_sdram_controller:u4|oFL_ADDR[3]"/>
        <port name="acq_data_in[85]" source="flash_to_sdram_controller:u4|oFL_ADDR[3]"/>
        <port name="acq_trigger_in[86]" source="flash_to_sdram_controller:u4|oFL_ADDR[4]"/>
        <port name="acq_data_in[86]" source="flash_to_sdram_controller:u4|oFL_ADDR[4]"/>
        <port name="acq_trigger_in[87]" source="flash_to_sdram_controller:u4|oFL_ADDR[5]"/>
        <port name="acq_data_in[87]" source="flash_to_sdram_controller:u4|oFL_ADDR[5]"/>
        <port name="acq_trigger_in[88]" source="flash_to_sdram_controller:u4|oFL_ADDR[6]"/>
        <port name="acq_data_in[88]" source="flash_to_sdram_controller:u4|oFL_ADDR[6]"/>
        <port name="acq_trigger_in[89]" source="flash_to_sdram_controller:u4|oFL_ADDR[7]"/>
        <port name="acq_data_in[89]" source="flash_to_sdram_controller:u4|oFL_ADDR[7]"/>
        <port name="acq_trigger_in[90]" source="flash_to_sdram_controller:u4|oFL_ADDR[8]"/>
        <port name="acq_data_in[90]" source="flash_to_sdram_controller:u4|oFL_ADDR[8]"/>
        <port name="acq_trigger_in[91]" source="flash_to_sdram_controller:u4|oFL_ADDR[9]"/>
        <port name="acq_data_in[91]" source="flash_to_sdram_controller:u4|oFL_ADDR[9]"/>
        <port name="acq_trigger_in[92]" source="flash_to_sdram_controller:u4|oGREEN[0]"/>
        <port name="acq_data_in[92]" source="flash_to_sdram_controller:u4|oGREEN[0]"/>
        <port name="acq_trigger_in[93]" source="flash_to_sdram_controller:u4|oGREEN[1]"/>
        <port name="acq_data_in[93]" source="flash_to_sdram_controller:u4|oGREEN[1]"/>
        <port name="acq_trigger_in[94]" source="flash_to_sdram_controller:u4|oGREEN[2]"/>
        <port name="acq_data_in[94]" source="flash_to_sdram_controller:u4|oGREEN[2]"/>
        <port name="acq_trigger_in[95]" source="flash_to_sdram_controller:u4|oGREEN[3]"/>
        <port name="acq_data_in[95]" source="flash_to_sdram_controller:u4|oGREEN[3]"/>
        <port name="acq_trigger_in[96]" source="flash_to_sdram_controller:u4|oGREEN[4]"/>
        <port name="acq_data_in[96]" source="flash_to_sdram_controller:u4|oGREEN[4]"/>
        <port name="acq_trigger_in[97]" source="flash_to_sdram_controller:u4|oGREEN[5]"/>
        <port name="acq_data_in[97]" source="flash_to_sdram_controller:u4|oGREEN[5]"/>
        <port name="acq_trigger_in[98]" source="flash_to_sdram_controller:u4|oGREEN[6]"/>
        <port name="acq_data_in[98]" source="flash_to_sdram_controller:u4|oGREEN[6]"/>
        <port name="acq_trigger_in[99]" source="flash_to_sdram_controller:u4|oGREEN[7]"/>
        <port name="acq_data_in[99]" source="flash_to_sdram_controller:u4|oGREEN[7]"/>
        <port name="acq_trigger_in[100]" source="flash_to_sdram_controller:u4|oRED[0]"/>
        <port name="acq_data_in[100]" source="flash_to_sdram_controller:u4|oRED[0]"/>
        <port name="acq_trigger_in[101]" source="flash_to_sdram_controller:u4|oRED[1]"/>
        <port name="acq_data_in[101]" source="flash_to_sdram_controller:u4|oRED[1]"/>
        <port name="acq_trigger_in[102]" source="flash_to_sdram_controller:u4|oRED[2]"/>
        <port name="acq_data_in[102]" source="flash_to_sdram_controller:u4|oRED[2]"/>
        <port name="acq_trigger_in[103]" source="flash_to_sdram_controller:u4|oRED[3]"/>
        <port name="acq_data_in[103]" source="flash_to_sdram_controller:u4|oRED[3]"/>
        <port name="acq_trigger_in[104]" source="flash_to_sdram_controller:u4|oRED[4]"/>
        <port name="acq_data_in[104]" source="flash_to_sdram_controller:u4|oRED[4]"/>
        <port name="acq_trigger_in[105]" source="flash_to_sdram_controller:u4|oRED[5]"/>
        <port name="acq_data_in[105]" source="flash_to_sdram_controller:u4|oRED[5]"/>
        <port name="acq_trigger_in[106]" source="flash_to_sdram_controller:u4|oRED[6]"/>
        <port name="acq_data_in[106]" source="flash_to_sdram_controller:u4|oRED[6]"/>
        <port name="acq_trigger_in[107]" source="flash_to_sdram_controller:u4|oRED[7]"/>
        <port name="acq_data_in[107]" source="flash_to_sdram_controller:u4|oRED[7]"/>
        <port name="acq_trigger_in[108]" source="flash_to_sdram_controller:u4|oSDRAM_WRITE"/>
        <port name="acq_data_in[108]" source="flash_to_sdram_controller:u4|oSDRAM_WRITE"/>
        <port name="acq_trigger_in[109]" source="flash_to_sdram_controller:u4|rgb_sync"/>
        <port name="acq_data_in[109]" source="flash_to_sdram_controller:u4|rgb_sync"/>
        <port name="acq_trigger_in[110]" source="flash_to_sdram_controller:u4|write_cnt[0]"/>
        <port name="acq_data_in[110]" source="flash_to_sdram_controller:u4|write_cnt[0]"/>
        <port name="acq_trigger_in[111]" source="flash_to_sdram_controller:u4|write_cnt[10]"/>
        <port name="acq_data_in[111]" source="flash_to_sdram_controller:u4|write_cnt[10]"/>
        <port name="acq_trigger_in[112]" source="flash_to_sdram_controller:u4|write_cnt[11]"/>
        <port name="acq_data_in[112]" source="flash_to_sdram_controller:u4|write_cnt[11]"/>
        <port name="acq_trigger_in[113]" source="flash_to_sdram_controller:u4|write_cnt[12]"/>
        <port name="acq_data_in[113]" source="flash_to_sdram_controller:u4|write_cnt[12]"/>
        <port name="acq_trigger_in[114]" source="flash_to_sdram_controller:u4|write_cnt[13]"/>
        <port name="acq_data_in[114]" source="flash_to_sdram_controller:u4|write_cnt[13]"/>
        <port name="acq_trigger_in[115]" source="flash_to_sdram_controller:u4|write_cnt[14]"/>
        <port name="acq_data_in[115]" source="flash_to_sdram_controller:u4|write_cnt[14]"/>
        <port name="acq_trigger_in[116]" source="flash_to_sdram_controller:u4|write_cnt[15]"/>
        <port name="acq_data_in[116]" source="flash_to_sdram_controller:u4|write_cnt[15]"/>
        <port name="acq_trigger_in[117]" source="flash_to_sdram_controller:u4|write_cnt[16]"/>
        <port name="acq_data_in[117]" source="flash_to_sdram_controller:u4|write_cnt[16]"/>
        <port name="acq_trigger_in[118]" source="flash_to_sdram_controller:u4|write_cnt[17]"/>
        <port name="acq_data_in[118]" source="flash_to_sdram_controller:u4|write_cnt[17]"/>
        <port name="acq_trigger_in[119]" source="flash_to_sdram_controller:u4|write_cnt[18]"/>
        <port name="acq_data_in[119]" source="flash_to_sdram_controller:u4|write_cnt[18]"/>
        <port name="acq_trigger_in[120]" source="flash_to_sdram_controller:u4|write_cnt[1]"/>
        <port name="acq_data_in[120]" source="flash_to_sdram_controller:u4|write_cnt[1]"/>
        <port name="acq_trigger_in[121]" source="flash_to_sdram_controller:u4|write_cnt[2]"/>
        <port name="acq_data_in[121]" source="flash_to_sdram_controller:u4|write_cnt[2]"/>
        <port name="acq_trigger_in[122]" source="flash_to_sdram_controller:u4|write_cnt[3]"/>
        <port name="acq_data_in[122]" source="flash_to_sdram_controller:u4|write_cnt[3]"/>
        <port name="acq_trigger_in[123]" source="flash_to_sdram_controller:u4|write_cnt[4]"/>
        <port name="acq_data_in[123]" source="flash_to_sdram_controller:u4|write_cnt[4]"/>
        <port name="acq_trigger_in[124]" source="flash_to_sdram_controller:u4|write_cnt[5]"/>
        <port name="acq_data_in[124]" source="flash_to_sdram_controller:u4|write_cnt[5]"/>
        <port name="acq_trigger_in[125]" source="flash_to_sdram_controller:u4|write_cnt[6]"/>
        <port name="acq_data_in[125]" source="flash_to_sdram_controller:u4|write_cnt[6]"/>
        <port name="acq_trigger_in[126]" source="flash_to_sdram_controller:u4|write_cnt[7]"/>
        <port name="acq_data_in[126]" source="flash_to_sdram_controller:u4|write_cnt[7]"/>
        <port name="acq_trigger_in[127]" source="flash_to_sdram_controller:u4|write_cnt[8]"/>
        <port name="acq_data_in[127]" source="flash_to_sdram_controller:u4|write_cnt[8]"/>
        <port name="acq_trigger_in[128]" source="flash_to_sdram_controller:u4|write_cnt[9]"/>
        <port name="acq_data_in[128]" source="flash_to_sdram_controller:u4|write_cnt[9]"/>
      </inputs>
      <outputs/>
    </node>
  </node_info>
</sld_project_info>